Auto zero comparator noise simulation

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Yarrow

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Hi,

I have a question regarding simulating/estimating the noise in a auto zero comparator. My chosen topology consists of 3-stage preamplifiers, each stage with a gain boosted preamlifier topology in an open-loop configuration. A latch is placed at the output and the entire circuit makes use of output offset storage.

Does anyone know how to estimate the noise of such a system? I have done the standard noise simulation in spectre, however, I think the standard noise simulation is not adequate in this case since it is not a continuous time circuit. It is more like a switched capacitor circuit, and PSS and PNOISE simulations should be used as I understand?

The total gain of the system is 1700 and the az frequency is 12.5MHz. Transisent simulations show good results, as well as transient monte carlo simulation. However I am very uncertain about the noise.

In the standard noise simulation the rms noise is 1mV (after an amplification of 12), based on my calculations the noise on the output of the last preamp should be amplified to 144mV rms. Taking the auto zeroing into account, the low frequency noise should be attenuated, and the noise on the output should be less than 144mV rms. However, the PNOISE simulation gives me some really high integrated noise values, everything from 0.9V rms to 22 V rms, depending on some minor adjustments in the simulation tool.

Anyone have any thought about my assumptions or perhaps some tips they can offer?

Thanks in advance, Yarr.
 

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