e_defranco
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Hi to all !
I read the tread https://www.edaboard.com/threads/309426/ and I have tried the code 2 but in my test the freq. was not 50Hz but 37.5Hz.
For this, I have re arranged the code as:
Substantialy:
1) I have changed the CPU freq to 3,2 MHz;
2) I have redifined the sinetable with 125 point;
3) I have changed the PWM freq. to 12,5 KHz (80 uSec);
4) I have added control signals on PB3 & PB4 for 50 Hz and 12,5 KHz.
All working fine, the pure half sine wave during 10 ms, on PB3 I have a square wave of 20 ms and on PB4 the square wave of 160 us ... but ... BUT .... all as I not expected, because, I expect that with the FCPU of 3,2 MHz and 125 point we don't need any delay ...
From datasheet the F PWM for fast pwm is F CPU io / (N * 256) where N is the prescale factor (1, 8, 64, 256 or 1024) in my case, 80 us.
And, in my project, the single point of the sine duration is 20ms / 2 / nr table points or 10/125=0,08 msec (80 us).
For all this, I will excpect no need any delay, but if I don't put delay value 250, the timing are not 10 ms for the single period output but is lower.
But with the value of 250 us delay, in teory, the timing should be completely different ... I am confused ..
where I went wrong ???
Thank in advance,
Emilio
I read the tread https://www.edaboard.com/threads/309426/ and I have tried the code 2 but in my test the freq. was not 50Hz but 37.5Hz.
For this, I have re arranged the code as:
Code:
//#########################################################################//
#define F_CPU 3200000UL
//#########################################################################//
#include <avr/io.h>
#include <avr/pgmspace.h>
#include <util/delay.h>
#include <avr/power.h>
//#########################################################################//
#define set_bit(port,bit) port|=(1<<bit)
#define clear_bit(port,bit) port&=~(1<<bit)
#define toggle_bit(port,bit) port^=(1<<bit)
#define byte unsigned char
//#########################################################################//
#define table_count 125
#define freq 50
#define one_delay 250
byte PROGMEM sinetable[]=
{
0, 6, 13, 19, 25, 31, 38, 44, 50, 56, 62, 68, 74, 80, 86, 92, 98, 104, 109, 115, 120, 126, 131, 137, 142,
147, 152, 157, 162, 167, 171, 176, 180, 184, 189, 193, 197, 200, 204, 208, 211, 214, 218, 221, 223, 226, 229, 231, 234, 236,
238, 240, 241, 243, 244, 246, 247, 248, 248, 249, 250, 250, 250, 250, 250, 250, 249, 248, 248, 247, 246, 244, 243, 241, 240,
238, 236, 234, 231, 229, 226, 223, 221, 218, 214, 211, 208, 204, 200, 197, 193, 189, 184, 180, 176, 171, 167, 162, 157, 152,
147, 142, 137, 131, 126, 120, 115, 109, 104, 98, 92, 86, 80, 74, 68, 62, 56, 50, 44, 38, 31, 25, 19, 13, 6
};
//########################################################################//
int main(void)
{
byte i;
clock_prescale_set(0);
DDRB=0x1b; // PB0, PB1, PB3, PB4 = output
PORTB=0x00; // PB0 e PB1 = 0
//Fast PWM, 12,5KHz // f out PWM OC0A e OC0B = f clock / N * 256
TCCR0A=(1<<WGM00)|(1<<WGM01); // Fast PWM TOP=FF TOV set on MAX count from BOTTOM to TOP and restart from BOTTOM
TCCR0B=(1<<CS00); // no prescaling (N=1)
while(1){ // infinite loop
//Positive half-wave
set_bit(TCCR0A,COM0A1); // rst PB0 (OC0A) on compare match, set PB0 at BOTTOM
TCNT0=0; // start timer at BOTTOM set PB0
for(i=0;i<table_count;i++){ // for each table value
OCR0A=pgm_read_byte(&sinetable[i]); // put it in OCR0A
_delay_us(one_delay); // wait one_delay for effective 10 ms out period
toggle_bit(PORTB,4); // toggle PWM carrier
}
clear_bit(TCCR0A,COM0A1); // disconnect PB0
toggle_bit(PORTB,3); // toggle FRQ_rete
//Negative half-wave
set_bit(TCCR0A,COM0B1); // rst PB1 (OC0B) on compare match, set PB1 at BOTTOM
TCNT0=0; // start timer at BOTTOM set PB0
for(i=0;i<table_count;i++){ // for each table value
OCR0B=pgm_read_byte(&sinetable[i]); // put it in OCR0B
_delay_us(one_delay); // wait one_delay
toggle_bit(PORTB,4); // toggle PWM carrier
}
clear_bit(TCCR0A,COM0B1); // disconnect PB1
toggle_bit(PORTB,3); // toggle FRQ_rete
}
}
//#########################################################################//Substantialy:
1) I have changed the CPU freq to 3,2 MHz;
2) I have redifined the sinetable with 125 point;
3) I have changed the PWM freq. to 12,5 KHz (80 uSec);
4) I have added control signals on PB3 & PB4 for 50 Hz and 12,5 KHz.
All working fine, the pure half sine wave during 10 ms, on PB3 I have a square wave of 20 ms and on PB4 the square wave of 160 us ... but ... BUT .... all as I not expected, because, I expect that with the FCPU of 3,2 MHz and 125 point we don't need any delay ...
From datasheet the F PWM for fast pwm is F CPU io / (N * 256) where N is the prescale factor (1, 8, 64, 256 or 1024) in my case, 80 us.
And, in my project, the single point of the sine duration is 20ms / 2 / nr table points or 10/125=0,08 msec (80 us).
For all this, I will excpect no need any delay, but if I don't put delay value 250, the timing are not 10 ms for the single period output but is lower.
But with the value of 250 us delay, in teory, the timing should be completely different ... I am confused ..
where I went wrong ???
Thank in advance,
Emilio