ATPG Untesttable Faults
1. which mode r u running dft compiler DB or XG?
2. How u r inserting the control (CP) & observe points (OP) using set_dft_configuration ?
Regarding atpg model for memories, i cannot give you the entire details here as it takes time. But, as u've BB'ed the RAMs, I can suggest the following.
Faults in the logic connected to data input, address and some control lines will be unobservable, while faults in the logic connected to data output will be
unobservable. So, just the CPs and OPs while inserting the DFT logic and proceed further.
This way u can get better coverage.
There are few other ways to handle memories in DFT, can see in asic-dft.com in couple of days.
Good Luck.
Sunil Budumuru
asic-dft.com