13. External Interrupts
The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT23...0 pins. Observe that, if
enabled, the interrupts will trigger even if the INT0 and INT1 or PCINT23...0 pins are configured as outputs. This
feature provides a way of generating a software interrupt. The pin change interrupt PCI2 will trigger if any enabled
PCINT[23:16] pin toggles. The pin change interrupt PCI1 will trigger if any enabled PCINT[14:8] pin toggles. The
pin change interrupt PCI0 will trigger if any enabled PCINT[7:0] pin toggles. The PCMSK2, PCMSK1 and PCMSK0
Registers control which pins contribute to the pin change interrupts. Pin change interrupts on PCINT23...0 are
detected asynchronously. This implies that these interrupts can be used for waking the part also from sleep modes
other than Idle mode.