ASK demodulator Design

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shaikss

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Hi,

I am designing a ASK demodulator.
Can you pls tell me how to give ASK modulated signal in Cadence ADE L?
I don't want to design ASK modulator and give that signal as input to demodulator. With the available instances Vsin/Vsource, how can I give a modulated signal to demodulator as input?
 

Use 2 square-wave Vsources with different frequencies and switch them alternately via 2 switches to the ASK input. Control the 2 switches via a 3rd square-wave Vsource with either a fix frequency, or use a VPWL source (perhaps controlled by a VPWL file) to achieve irregular switching timing.
 

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