Hey,
I have developed an Ultra low power 32 Bit adder using a new logic style and would like to compare it with a standard CMOS adder. Does Cadence have a built in ASIC libraries like the digitallib in TSMC 0.18u where they have a single bit adder cell designed. I am looking for it because I feel that will be an optimised design and will be a good benchmark.Pls let me know where I can find one.