ARM Cortex M4 Architecture Memory map

[chirag2239]

Hi Gurus,

I got to know that in ARM Cortex M3/M4 architecture, processor uses the code and SRAM region for the program execution. But sometime it integrates the Code as well as SRAM regions. Can anyone guide me how and why is this integration possible?

I need one example for that. Can anyone please explain? Why there is a need for integrating these both regions? Because architecturally, code regions are ROM which is read only where RAM provides an access to processor for read as well as write also. So this integration can cause any kind of segmentation fault if we try to write in code region after integration? The properties remains as it is or it will be changed after integration of CODE and SRAM region?

One more question is that, as these areas are already defined with the some particular limitation, then architecture will allow this integration?

Please provide the explanation. Hoping for the best explanation from all the Gurus.

Reference: The definitive guide for ARM Cortex M3 and Cortex M4 MCUs - Joseph Yiu. Topic Number: 4.4.2

Thanks.
Chirag

 

[Easyrider83]

For example you connect to you arm external sram. Having his own ram now he has 2 regions internal+external. This regions you define in project settings to let compilier know where to place the variables. Another option is to not tell compilier where you gonna add region and use it for dynamic allocation (malloc, free). Or use both.