Anyone can tell me the difference between VCS and VCS-MX?

[feel_on_on]

vcs mx

Anyone can tell me the difference between VCS and VCS-MX?

Why there is 2 install path VCS and VCS-MX?

 

[toad]

vcs-mx

VCS-MX is for mix language(verilog/VHDL)

 

[feel_on_on]

vcsmx

You means VCS only for verilog and VCS-MX for both VHDL and verilog?

 

[funzero]

vcs mx vcs better

i think vcs-mx can do some analog simulation

 

[sarath51]

vcs vs vcsmx

I think it si mostly used used for Mixed Verilog and VHDL simulation, but not as popular as its mentor conterpart

 

[intermilan00]

A 78-month old post ... anyway, I just had the same question and would like to share my thoughts.

It is not about language. VCS supports VHDL, Verilog, SystemVerilog, SystemC, mixed-HDL, openVera, too.

I think VCS is a full suite of "Functional Verification Solution", and VCS-MX is merely a "simulator".

VCS-MX is for analyzing, elaborating, compiling and simulating a design and/or testbench. And VCS has much more features (besides a simulation engine), such as: comprehensive coverage, comprehensive assertion techniques, advanced visualization environment, etc. (Details are referred to: **broken link removed**)

 

[sharath666]

I am suspecting VCS-MX can be used for mixed level simulation (analog & digital)

 

[tlihu]

So, is it true that VCS = VCS-MX + other stuff while VCS-MX is for simulation environment only?