analyze and find oscillating frequency

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akbarza

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hi
I found the below schematic in an Lm358 datasheet that belongs to www.onsemi.com.
by attention to the pic, in the datasheet is written that for R3=R1||R2 then the oscillation frequency is f=R1*Rc/(4*c*Rf*R1). but there is no Rc in the schematic.
1)how can analyze the circuit to obtain a formula for frequency?
2)can explain to me why in node triangle_wave, the shape of oscillation is a triangle wave, and also for node square_wave?
3) as we know this circuit will be connected to another circuit and it causes a load effect. How can I import the role of load in the schematic?
4)suppose the design is for a special frequency and R's and c are determined for that frequency. is there any condition on Opamp as Unity gain bandwidth or others that Opamp must satisfy?
thanks
 

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R1 only works to reduce sensitivity to asymmetric Sqr wave swing with Vcc=15 by pulling towards Vref and doesn't work at 5V as I mentioned.

This model conforms to TI's spec for 1.5V input headroom with U2_Vin- node below 3.5V with Vref=2V , even though NS or some UNIVERSAL spec was used which may be less detailed and obsolete. The LM2904 has 2V headroom.

I wonder how does one display node#'s on schematic?
 
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1) Basically you have a ramp generator and a hysteretic comparator. So The OpAmp integrator
feeds a current into the feedback cap ramping the integrator output at a rate computed by :

Q = C x V, I = C x dV / dT, I = Comparator high output V / Rin at inv input. So solve for dT.
But dT occurs during the comparator hysteresis interval, so you compute the time it takes to transit that dV
that comparator is tripping at.

Do same for other ramp, then add the dT's together to get period.

2) Comparator outputs a rectangular wave because for tiny inputs x comparator G (which is real high, like 100,000
to 1,000,000), slams from one rail to the other, and stays there until input changes direction and crosses trip point.



The integrator takes a rectangular wave and converts it into a ramp, a triangle or sawtooth depending
on setup. The cap., when fed a constant current produces linear ramping waveform.

Q = C x V, I = C x dV / dT so dV / dT = I / C, and if both C and I are constant then dV / dT is constant
linear ramp.


3) Loading effects should be minimal if within the ratings of the OpAmp output. Eg. the OpAmp
and Comparator look like Voltage sources, a V source in parallel with a load always stays at same V
independent of load, ideal case. How much loading do you need ? Current or power.....

4) Limiting conditions, at higher frequency, are slew rate opamp spec limits and G error (loss of G) in
the integrator. Also comparator speed/delay can contribute to non ideal behavior.


There are many other effects, like T effects on C, its value, its leakage, same for R's, thermal effects in
OpAmp delivering power, noise........you can spend a lifetime on this topic. Even gravitational effects
and EMI from sun bursts........., vibrational effects on C dielectric., non linearity effects on RRIO OpAmp
input stages...... gah must kill myself.......



Regards, Dana.
 
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One point is still open, a simple expression for oscillator frequency.
The formula in Onsemi datasheet is wrong as far as I see. With Vref adjusted for 50 % duty cycle, Vref = (Vout,l + Vout,h)/2, we get f = R2/(R3*4*Rf*Cf). Valid for low frequencies where limited OP slewrate can be neglected.
 

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Some datasheets for formulae cannot be trusted. One must verify on their own then reason thru the discrepancy considering errors and tolerances.

I remember in one of my early Electronics 303 labs, we built a staircase generator using an RCA datasheet. The TA could not help anyone to get theirs to work. Mine worked because I modified the schematic in the datasheet to make it work. The draftsman must have been short of coffee that day and the Engineer slept in. from staying up so late the nite before.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
 

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hi
can I ask you how the common mode range is vcc-1.7 ?
--- Updated ---

this 2v headroom, Where did this amount come from?
what is the meaning of PRIO?
how can I calculate vol and voh? plz, explain.
--- Updated ---

D.A.(Tony)Stewart said:
Vref = 1.5 better than 2 to allow for Vcm max.

But now your duty cycle changes with frequency from RC

I think the optimal d.f. tuning is a bias to the integrator slightly up from Vref.
Click to expand...
how vcm is calculated?
--- Updated ---

FvM said:
LM358 asymmetric output swing
Click to expand...
what is your meaning of ' LM358 asymmetric output swing'?
--- Updated ---

thanks very much
--- Updated ---

hi
in reply#6, in the introduced reference (blue link): it is written that one way for controlling the amplitude of oscillation is the slew rate of opamp.
any more explain?
 
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Correction the input headroom is 1.5V below Vcc. Above this the device won't work, i.e. it does not have enough PNP bias. (2V was for a similar model)

The integrator can be Vcc/2 because both inputs are constant = Vref. I prefer separate R=R pull-down bias resistors for the integrator = Vref/2 then with a smaller resistor 5% of R in series with the pullup to raise d.g. to 50% due to the asymmetry of the square wave not = Vcc/2.

The datasheet table Electrical Parameters answers all about Vcm and output low Vol and output high Voh (saturated). Often a pullup resistor 4k7 is used to increase Voh. You don't calculate it, unless your were in Electronics 301 and had to design this on a 1973 exam.

With NPN Vce(sat) for Vol, it is much lower than Vcc-Voh, so the difference is asymmetric, which affects hysteresis and duty cycle.


"a priori" is Latin.

What year are your studies?
 

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hi
in the mentioned link in #6namely:
https://eng.libretexts.org/Bookshel...Frequency_Generators/9.02:_Op_Amp_Oscillators
, said that ( in the below pic) to avoid load effect, R's and c's must be chosen so that the r of the next stage is 10 times larger.
also in the pic 1M resistor can omitted. is it true? does not this omission have any effect on the circuit?
if I want to know the impedance seen from the left of the 1M-ohm resistor, what can I do? must I break the connection of opamp's output and 100n cap? or it is not necessary?
 

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akbarza said:
can I ask you how the common mode range is vcc-1.7 ?
Click to expand...
I´m not sure what you are asking for:
* How we know that the common mode voltage range is vcc-1.7V: --> because we read the datasheet. (different values for different operating situations)
* Why the datasheet says so: --> because of the inner design of the OPAMP.

akbarza said:
this 2v headroom, Where did this amount come from?
Click to expand...
Common mode input voltag range.

akbarza said:
what is the meaning of PRIO?
Click to expand...
It is "RRIO". Rail-to-Rail-Input-and-output.
It´s easy to find out by yourself: Just do an internet sesrch for "what does RRIO on operational amplifiers mean"

akbarza said:
how can I calculate vol and voh? plz, explain.
Click to expand...
No need to calculate. It is given in the datasheet. In a the table, also often as a chart.
voh or V_OH is the abbreviation for "voltage output high". I.e. the voltage output swing from rail at V+.
Again here: you can do an internet search for "what does voh at operational amplifier mean".
akbarza said:
how vcm is calculated?
Click to expand...
No need to calculate. It is given in the datasheet. In a the table, also often as a chart.
Your design nedds to be within these limits.
In short: When an operation amplifier is in regulation (the standard situation an OPAMP is designed for) then the voltage at both inputs is considered equal.
There is only a very small deviation.
So both have the same voltage .. or in other words: "both have a common voltage".
So V_CM = V_IN+ = V_IN-
(with very small deviation in the millivolts)

akbarza said:
what is your meaning of ' LM358 asymmetric output swing'?
Click to expand...
It is given in the datasheet.
Do a datasheet search for "output swing".
There are two of them: one to the positivie rail (V+) and one to the negative rail (V-).
"symmetric" means almost the same as "identical" or "equal".
So if the output swing to V- is not equal to the output swing to V+, then one talks about asymmetric output swing.

***
I recommend to learn basics about OPAMPs. There are tons of application notes, documents, even videos. In my early designer days we had no internet, now you have, so use it!

Klaus
 
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akbarza said:
said that ( in the below pic) to avoid load effect, R's and c's must be chosen so that the r of the next stage is 10 times larger.
also in the pic 1M resistor can omitted. is it true? does not this omission have any effect on the circuit?
Click to expand...
In both cases, read the paper thoroughly.
They don't say, phase shift network must be implemented with staggered RC values. It can be to reduce load effect. But they also show calculation for equal RC.

Also they don't omit 1 M resistor. They "shift" 100 k in its place and modify feedback resistor value, keeping original gain of 8.

 
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can I ask you how the common mode range is vcc-1.7 ?
Click to expand...

Look at input stage :



This is a simplified look at input stage :




Q19 first pic connected to emitters is a current mirror to set bias. So it needs a minimum Vcollector
to stay operating, and coupled with Q17 and Q21, the inputs, and the Q18 Q19 they all need
bias minimums.

The input 1.7 V limitation is 30V - 28.3 = 1.7V off the positive rail.



"Normally" a datasheet shows a graph of CMR versus supply V, the 358 is missing this. But different
manufacturers have different specs, so look at those as well. Here is that graph from a NSC datasheet :



what is the meaning of PRIO?
Click to expand...

RRIO is complicated. It conveys a meaning of rail to rail at inputs and outputs,
but if you look at datasheets, especially the output spec, that only exists with
no load on output. Once an output is loaded it no longer swings precisely to the
rail. But for good parts comes close. On the input side some modern parts actually
swing a couple hundred mV outside the rail. But mostly to the rail.

Regards, Dana.
 
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As far as we are still discussing the triangle/square wave generator, circuit operation is achieved if Vref is within Vcm limits. It's not necessary that both comparator inputs keep Vcm range, because LM358 doesn't show phase reversal with input overload. You can verify by analyzing the input stage transistor level circuit.
 

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how can I calculate vol and voh? plz, explain.
Click to expand...

Its all about loading on output, there are specific specs in the spec table, and typical graphs as
below, upper right, lower left.




Excellent ref material :



Operational amplifiers; design and applications : Graeme, Jerald G., ed : Free Download, Borrow, and Streaming : Internet Archive

A complete treatment of the design and application as well as the theory and testing of operational amplifiers has been developed by the staff of Burr-Brown.
archive.org


Regards, Dana.
 
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thanks for reply
I read the datasheet of onsemi.com lm 358, twice, but not very carefully, and I did not find the things you said. ( in the second I explored vcc-0.7 and vcm, but I could not find them).
thanks again for the reply and your good suggestions
--- Updated ---

thanks for reply
I read the page, and then questions arose. after threatening questons in this place, I read the page again
--- Updated ---

thanks for reply
 
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opamps, if you want the inputs to operate in the linear mode, you better obey Vcm. This means Vin- tracks Vin+ for Vref + signal but using inverting amplifier (integrator) the -ve feedback tracks Vin+ , therefore there is no signal on Vin- in linear mode due to negative feedback, so it may be biased to near V+/2 yet using non-inverting amplifier Vref must be lowered below Vcc-1.5 according to level of peak signal.
 
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D.A.(Tony)Stewart said:
Vref must be lowered below Vcc-1.5 according to level of peak signal.
Click to expand...
Are you claiming an additional constraint for Vref? I stated that regarding Vcm range, it's sufficient that Vref stays inside. The linear operated integrator OP has both inputs at Vref and the comparator works well with one input at Vref and the other inside supply rails. The other restriction for Vref besides keeping Vcm range is that it must allow Vtriangle to reach both comparator switching points for given R2/R3, but not related to Vcm.

The lengthy TI forum discussion about possible phase reversal can be resumed in the single sentence quoted by danadakk. With one input inside Vcm, it can only occur if the other input is pulled below negative rail. This condition is safely excluded for the discussed circuit.
 
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Hi,
akbarza said:
I read the datasheet of onsemi.com lm 358
Click to expand...
The thread currently has more than 1k views. Every single member who wants to helo needs to do the search for the datasheet.
Do yourself a favour and post a link to the datasheet directly at the manufacturer site.
1x your effort vs 1000x the helpers effort and the risk to talk about different surces of informations.

Klaus
 

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