if u were talking about modelsim in FPGA design simulation in no way u can do this ,the signal must be DIGITAL & depending on your design u can substitute the analog signal with releated digital signal ......
ok plz correct me if i got u wrong
u made a digital filter , the input signal is digital having different frequencies & u wanna simulate a signal with varying frequencies on modelsim ?
did u try to make the input signal as a clock(from modelsim) & change duty & period to the desired frequency
or ofcourse the sys clock must be the higher frequency then u can put additional block to force input cotrlled with clk divider to the desired frequency
let me remind u ....the filter u made must be digital filter & hence u can't apply a compsite frequencies analog signal direct to the Digital filter without passing through ADC
note that digital filter is capable of filtering square waves
ok i did it ......i know that digital filter input is in digital form (say 8 bit ) ...
what i did is sample a composite signals in matlab and got samples ..and convert it in binary (8 bit) and applied to filter input .Now i changet the format of waveform window in modelsim to analog and i can view the analog waveform ..
set pixel setting according to your choice to get smooth output..