Analog Design Question

[master_picengineer]

Hi all,
I designed and simulated a flip-flop at transistor level and I wish determine set up and hold up times as well as the maximum clock frequency that can clock this flip-flop.
How can I do this ?
Any reply is welcommed.
Thanks in advance.

 

[kola]

setup time:
1. set flip-flop to 0(1)
2. change data edge 0->1 (1->0) at T before clock edge
3. check flip-flop out
3.1 if D==1 (0) then T = T-dT
3.2 if D==0 (1) then T = T+dT
4. check accuracy of T, if not satisfactory go to 1


hold time:
1. set flip-flop to 0(1)
2. change data edge 1->0 (0->1) at T after clock edge
3. check flip-flop out
3.1 if D==1 (0) then T = T-dT
3.2 if D==0 (1) then T = T+dT
4. check accuracy of T, if not satisfactory go to 1

We use bisection division method for determine setup und hold time.

 

[Chethan]

Hi Kola,

What is this bisection method? Can you please explain?
any materials regarding the same would be very helpful.

Thanx

 

[master_picengineer]

Hi members,

What about the minimum pulse width without degradation to use with such a dff ?

Thanks.

Added after 29 minutes:

Hi Chethan;
I found this:
https://web.engr.oregonstate.edu/~moon/ece323/hspice98/files/chapter_27.pdf
Hope it help.