[SOLVED] AMS .35um:Calibre DRC problems

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ghegde

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Hello there,
I have DRC error which says nwell is hot,though the nwell is connected to vdd!. I am not able to understand why I am getting this error.
Any help regarding this is greatly appreciated.

I have attached the layout screen shot for your reference.

Thanks in advance,
 

Check the distance between nwell contacts on the right side and left border of well. I supppose If You will make nwell contact around well, but not further than 25µm the error will disappear.
 

Hi,
Thanks for the reply.I placed the nwell contact such that they are not more than 25um apart.But it didn't resolve the problem
 

Found a solution!!!!
Instead of using one big nwell,I split it into 3 small nwell.That made the error to vanish.
I still wonder how this resolved the error?How one big nwell was hot but not the small chunks which added together will yield the same area.Note that there is no change in Ntap.

Attached the image for reference

Thanks
 

Maybe the contacts/well area ratio was to small? A few times I draw DAC matrices as large as 750x150µm^2 or 385x340µm^2 placed in one nwell and I never had hot nwell info, but I used many nwell contacts - the rings had 5 contacts width and additional contact for each transistor near it source.
 

I don't think the contacts/well ratio was the problem, because in one of the trial I put many contacts(in almost all free space ) in the nwell,but i still had that problem.
 

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