Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Am I not smart enough to do the assignment?

Status
Not open for further replies.

windsnow

Newbie level 5
Newbie level 5
Joined
Nov 7, 2004
Messages
8
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
86
I have spent 4 days reading the textbook and still have no idea what to do for this assignment? (at least not sure what the ASM diagram should look like) Anybody think this is hard or I am not smart enough?

**broken link removed**
plz give me help.
 

Anybody think this is hard or I am not smart enough?
never think that way. in the worst case one hasn't tried hard enough, so it is not a question of smartness at all. tell what you have done till now, I hope it is a big list.
 

Bluechem said:
Anybody think this is hard or I am not smart enough?
never think that way. in the worst case one hasn't tried hard enough, so it is not a question of smartness at all. tell what you have done till now, I hope it is a big list.

I have some idea for the ASM diagram, which is the initial step for this assignment, but don't know if it is right or not.
 

Ok BEFORE YOU DO THE CODING in VHDL or other ..
DESIGN IT .. I mean with paper and pencil DRAW all the components .See how the control signals are supposed to work
Then look for a piece of code that wil describe the bigguest block then add the logic that you already designed ...
 

One thing to cheer you up is to note that sometimes people get fixed ideas on how to do things and overlook other ways. In psychology there is a condition called 'functional fixity' that is similar to this. This is independent of intelligence or skills. People do need to practice exercising their imaginations by thinking of all of the ways, no matter how ridiculous, to solve a problem. Try doing this in ordinary everyday situations when you have the time to ponder before doing something or after.

The English word engineer comes from the Greek or Latin word for ingenuity. This application of imagination is most important in doing engineering designs.
 

I'm relearning VHDL now. After looking at your webpage i think i will use it to help me. I will work through your assignments and if i can do them i will help you out.
No promises as i'm busy at work but i used to be handy at vhdl so i might come up with something...
 

joc_06 said:
I'm relearning VHDL now. After looking at your webpage i think i will use it to help me. I will work through your assignments and if i can do them i will help you out.
No promises as i'm busy at work but i used to be handy at vhdl so i might come up with something...

thank you so much joc_06, I have read all the sections of the textbook and still got no idea.
Later my friend told me there is no use at all by just reading the textbook.

I got what you guys meant, thank you all.

and to joc_06, if you can come up with the ASM diagram first, plz tell me. Since the ASM diagram is the first step for this project, but I don't know what's this ASM diagram should look like. Thi is project is due at Nov 11, 4 days away from now. I don't want to give up.

thanks for all your encouragement and helps.
 

I will help you but i will not give the project to you. I'm not even sure if i can do it myself.
I was a student myself only a little time ago and looking back at some of the projects i copied i realise i would have been much better off for the exams and future work if i had done the stuff myself.
I'll look at it today...
 

joc_06 said:
I will help you but i will not give the project to you. I'm not even sure if i can do it myself.
I was a student myself only a little time ago and looking back at some of the projects i copied i realise i would have been much better off for the exams and future work if i had done the stuff myself.
I'll look at it today...

okay, thank you so much.
You know ASM diagram right? it's like a flowchart.
If you can do it, give me hints plz.
 

I have seen but never done an asm chart before.
We always used state diagrams.

Your teacher uses much notation different to mine. I must look through your notes. i would approach the problem differently but that is no good to you so i will do it his way which requires learning asm stuff.
 

joc_06 said:
I have seen but never done an asm chart before.
We always used state diagrams.

Your teacher uses much notation different to mine. I must look through your notes. i would approach the problem differently but that is no good to you so i will do it his way which requires learning asm stuff.

joc_06, how far you get now? if you have state diagram, I know how to change them to ASM diagram. Can you plz post whatever you have now? I appreciate. I will use them for refernce only, because I really want to learn it instead of copying others.
 

Your teachers notes are not good and i have no access to mano book.
The problem is ambiguous and i need to make assumptions to complete it.
It will take some time...
 

joc_06 said:
Your teachers notes are not good and i have no access to mano book.
The problem is ambiguous and i need to make assumptions to complete it.
It will take some time...

yup, I agree, many ppl avoid taking him. I am working on it too, and getting help from my other friends.
 

I have done the state diagram and it seems ok.
I have no scanner so i cannot upload it but it's not too hard.

Firstly regardless of how you implement a problem in hardware the state diagram's or asm diagram's should be similiar so your teachers req for 2 diagrams for the two hardware scenario's seems wrong to me.

For the diagram i say. its a moore machine with 4 states. an initial S0 which represents cl=0, pop = 0, push =0 and emp=0.

If in S0 you are input push=1 and full=0 then you goto S1 where top value=data in

if in S0 you are input pop=1 and if emp=0 then goto S2 where out=next value in stack
etc etc.

Also fill in where you go from S1 to Sx and S2 to Sx etc.

It is not that hard.

The hardware implementation now will begin to differ slightly if you use choice 1 - reg file or 2 - 4 shift reg's.

You will need a 4 bit counter to see if stack is full or not too.

I do not think asm diagrams are good method but you say you can convert state to asm.

Now must work...
 

    windsnow

    Points: 2
    Helpful Answer Positive Rating
joc_06 said:
I have done the state diagram and it seems ok.
I have no scanner so i cannot upload it but it's not too hard.

Firstly regardless of how you implement a problem in hardware the state diagram's or asm diagram's should be similiar so your teachers req for 2 diagrams for the two hardware scenario's seems wrong to me.

For the diagram i say. its a moore machine with 4 states. an initial S0 which represents cl=0, pop = 0, push =0 and emp=0.

If in S0 you are input push=1 and full=0 then you goto S1 where top value=data in

if in S0 you are input pop=1 and if emp=0 then goto S2 where out=next value in stack
etc etc.

Also fill in where you go from S1 to Sx and S2 to Sx etc.

It is not that hard.

The hardware implementation now will begin to differ slightly if you use choice 1 - reg file or 2 - 4 shift reg's.

You will need a 4 bit counter to see if stack is full or not too.

I do not think asm diagrams are good method but you say you can convert state to asm.

Now must work...

I got what you said, but I am working with other friends, and we decide to use only one state, and we ask our instrutor and he said one state is okay too. what do u think? Are you going to code them in vhdl files? if yo u do use your own method, and if it works, plz send the files to me.
 

1 state??

Is he off his head? I cannot see how this is possible or practical. Why would you need 4 shift reg's so.
I cannot wait to see his solution if he posts it up.

As for the coding i am toying with a few ideas which i would like to get verified before i proceed.

I reckon a counter is required to know if the stack is full/ what value is the highest value but as i dont have a vhdl compiler i prob wont finish this.

Will he post up solns?
 

You guys are mis led , I solved it wait I will post it. in two days time.
very good to solve.
 

I would very much like to see your soln. Am v busy at work so impossible to spend much time at this plus problem is ambiguous. I can go one way or another at it.
 

A question for windsnow:

did your teacher ever post up the soln for ass#3??
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top