ADS Layout: EM simulation error

[jdstavares]

Hi everyone. I'm having some troubles performing the layout.

I am having the error:

"ERROR : At least one port pin or bondwire end is not fully connected to a conductive part of the design (see the layout processing report for details).This setup is invalid for a Momentum simulation."

But, when I go to the design report I don't have any error "Report for Rectifier_LayoutCircuit_lib:Rect_lay5:layout (layout): There are no unconnected pins. There are no nodal mismatches. There are no wires in layout. There are no nets in the layout whose objects do not touch. There are no net overlap zones in the layout. Manufacturing grid is disabled in the layout. There are no pcell evaluation errors in the layout hierarchy. There are no parameter value mismatches. Overlaid items: Overlapping wires/traces not on the same net: None"

Can anyone give me some tips?