Adjustable impulse generator circuit. Need idea.

Hello,

I have made a circuit (strain gauge amplifier) - please see attached circuit.

Non-inverting Schmitt trigger attached to the out of instrumentation amplifier works fine and generates signal (+2V at "high" state, and -1V at "low" state).

So. Theoretically if we attach proper NPN transistor to the out of Schmitt trigger we could control emitter-collector current (36V or 50V capacitor discharge and solenoid action in my case).
It means that capacitor will be discharging as long as we apply pressure on strain gauge and Schmitt trigger in its "high" state.

Till now I don't know how to implement following:

- No pressure applied on strain gauge (capacitor may charge, etc)
- We apply pressure on strain gauge;
- Schmitt trigger switches to its "high" state;
- One short impulse generated and applied to base of our NPN transistor (and no matter how long Schmitt trigger remains in its "high" state).
- To be able to produce next short impulse - Schmitt trigger must be switched to its "low" state before.

On the circuit diagram - our "clever impulse generator" is a red question mark.

Problem Nr. 2: Impulse generator must be adjustable (capacitor discharge control and solenoid action time).

Any ideas are appreciated.
Thanks.

Hi Igru25,
Just use any CMOS timer555. You can generate the pulse time you want. Especially in the range needed by a solenoid. The pulse length is set by a combination of resistance and capacitor. If you put a potentiometer in place of the resistor you can adjust the pulse length to the value you wish.

Thanks.

I found article about monostable 555 usage and it might work.

But I want avoid extra IC (I plan battery powered device) and I have following idea (please see attached circuit).

Idea is simple. Charge capacitor if schmitt trigger low (-1V) and discharge capacitor if schmitt trigger high (+2V).

Q1 - charge circuit
Q2 - discharge circuit

But there is obvious error - Q1 PNP never closes since emitter potential (+3V) is always bigger than base potential (-1V, +2V)... Q1 is always open. It is problem.

Q2 NPN must work
Emitter: 0V
Base -1V: closed
Base +2V: opened

No idea at the moment how to get Q1 work.

You should consider the CMOS 555. It will be the lowest power solution. It needs only 60uA on and you can put it in sleep mode.
If not, why don't you replace the PNP by a P-MOS.? It will not conduct with 1 V Vgs.

use UJT and build a relaxation oscillator.