ADC design - "gnd! shots to gnd" error

[liushaotao]

I am doing ADC design. In the layout design, the digital part is used standard cell and the analog part is draw by myself. But when i do the LVS check, it generated a error, "gnd! shots to gnd" (gnd! is the global ground for standard cell; gnd is the pin I created for analog part). Can any one help me to solve this problem?

 

[dick_freebird]

global gnd! shots to gnd

Embedding global gnd! in a standard cell is just stupid.

gnd! needs to be your top level simulation testbench ground
reference, and any node inside an IC is guaranteed not to be,
if you care about L and/or R in any way. Standard cells
should use gndd! (digital global "ground") and then you can
"break" the nets with a presistor or something.

Maybe you have to do this to your layout (add a metal
resistor, or something - messy if you have a web of ground
bus straps, all needing cut).

Your other option is to continue living a lie, and call your
analog ground (gnda!) "gnd!" as well.