ADC connection with Microblaze????

[umer_366]

hi all,
i need to take data from signal generator for Microblaze processor...
i have to pass it via ADC LTC1407A-1..
how to connect it to microblaze....
plz help out..
thanks

 

[amraldo]

The FPGA should have a hard ADC on chip that has a bus compatible with those of microblaze and inputs connected to external input pins.

 

[umer_366]

i have Sparten 3E board with hard ADC on it and i have updated my UCF file according to my pin configuration..
before that i need port connections with Microblaze and ADC...
for that i needed SPI interface and the following interfaces with pre amplifier in EDK as mentione din the manual of my Sparten 3E starter Kit board

AMP Interface Signals
Signal FPGA Pin Direction Description
SPI_MOSI T4 FPGA?AD Serial data: Master Output, Slave Input.Presents 8-bit programmable gain settings

AMP_CS N7 PGA?AMP Active-Low chip-select. The amplifier gain isset when signal returns High.
SPI_SCK U16 FPGA?AMP Clock
AMP_SHDN P7 FPGA?AMP Active-High shutdown, reset
AMP_DOUT E18 FPGA?AMP Serial data. Echoes previous amplifier gain settings. Can be ignored in most applications.


ADC Interface Signals
Signal FPGA Pin Direction Description
SPI_SCK U16 FPGA?ADC Clock
AD_CONV P11 FPGA?ADC Active-High shutdown and reset.
SPI_MISO N10 FPGA?ADC Serial data: Master Input, Serial Output. Presents the digital representation of the sample analog
values as two 14-bit two’s complement binary values.



how to make pin connections in EDK???
i have SPI ip core for that/
should i need 3 ip cores to be attached with microblaze and should i use GPIO ip core for rest of the connections????
if so then how many SPI and how many GPIO connections are required???
kind of u

 

[Julian_H]

Anyone knows how can I implement an ADC in a microblaze System?

I will apreciate any kind of support, labs, tips, codes and references.

Thanks guys!!!

** Im using an Spartan3E-XCS1600E

 

[rourabpaul]

m new in edk platform,(using spartan 3E)

I have notice that there is two types of IP in xilinx edk 11.1



1. I.P.s like dip,push button,ethernet,urlite,sdram,flash memory ect. we are adding these ips during the bulding of BSB.



2. I.P.s like adc,dac,ps/2 etc. We can add these I.Ps after buliding the BSB.



What is the difference b/w them?



Im going to add the delta sigma adc with my project. as per i think the four ports of this ip these ports
IM2INTC, Agtr, DACout, and Sample should be external port. ami i right?

if it is right then i must edit the .ucf file also, in that could anyone tell me that pin numbers?.



before this project i was trying a vhdl code for adc(J7). I saw in that case the ports are CLK,SPI_miso,SPI_mosi,AMP_shdn.SPI_clk ect

why these port are missing when i using a proccessor.is these ports are controlled by processor itself??