naikgadu
Newbie level 1
![Newbie level 1](/styles/images/ranks/alevel1.gif)
Hello everyone, this is my first post here,
I have designed a passive tunable combline filter for cellular bands using agilent ADS and the results were high insertion loss in the lower frequency of operation.
Now trying to design an active combline filter to cancel the losses.
My problem is how to determine the dc bias and the negative resistance offered by the transistor?
and the exact circuit to be placed in filter design.
It would be of great help if any one can help me with this issue, thanks
I have designed a passive tunable combline filter for cellular bands using agilent ADS and the results were high insertion loss in the lower frequency of operation.
Now trying to design an active combline filter to cancel the losses.
My problem is how to determine the dc bias and the negative resistance offered by the transistor?
and the exact circuit to be placed in filter design.
It would be of great help if any one can help me with this issue, thanks