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[SOLVED] Access BRAM from PS

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aminpix

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I have a zynq FPGA and I am trying to read a file from MicroSD, then write the file into the BRAM of the FPGA and do some process on them in PL side of the Zynq.
I can read and write to the BRAM from PL side.
The block diagram is like this:

Screenshot from 2023-02-22 04-03-32.png


and my PS code is this:


Code:
#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"

int main()
{
    init_platform();
    UINTPTR ADRS1 ;
    u32 din ;
    int i ;
    ADRS1 = XPAR_BRAM_0_BASEADDR ;
    while (1)
    {
        usleep(1000000);
        for (i=0;i<50;i++)
        {
            din = *((uint32_t *)(ADRS1 + i));  //(uint32_t)*(ADRS1+i);
            printf("val %i:  %lu \n\r",i, din);
        }
    }



Now, I just want to read BRAM from PS (and next step will be write into the BRAM).

What is wrong with my code?
 

Solution
I found the solution for my problem:

  • 1) AXI_BRAM_CNT should have one controller not two.
  • 2) The BRAM address (ADRS1) should increase by 4 not 1
  • 3) Xil_In32(ADRS1); was the correct way of reading from BRAM.
  • 4) I can use u64 instead of UINTPTR
In principle...
1. The BRAM needs to have an AXI wrapper module or maybe an AXI BRAM Controller (if such a thing exists within Xilinx).
2. This AXI-BRAM then needs to be connected to the AXI Interconnect module (the interface between PS and PL) as a slave.
3. You can write C code for the ARM core that will be able R/W the BRAM over the AXI.

There should be help available on how to do it in details. You search word needs to be "Accessing BRAM from PS + Zynq"
 

I found the solution for my problem:

  • 1) AXI_BRAM_CNT should have one controller not two.
  • 2) The BRAM address (ADRS1) should increase by 4 not 1
  • 3) Xil_In32(ADRS1); was the correct way of reading from BRAM.
  • 4) I can use u64 instead of UINTPTR
 

Solution
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