May be, the question is what?
I tested, AD865x, but it's still not it would take something better
Current is supposed to flow in loops. I don't know what you mean with "Ix is zero in virtual ground"? The sum of currents flowing into a node has to be zero (according to KCL), so Ix is continued up to the autobalance source and returning with opposite sign through the cabel screen. No current is flowing to or from the "POT" sense terminals or through the respective cable screen.but Ix is zero in Virtual Ground 0, because from Autobalance bridge flow opposice current.
A detailed description is in the Agilent literature linked in post #7.But then some do not understand how works Autobalance Bridge?
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