about the number of multipliers that is mentioned in the synthesis report

Status
Not open for further replies.
K

kannan2590

Member level 4
Joined
Sep 1, 2012
Messages
77
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
india
Visit site
Activity points
2,321
According to this post the question is for the filter written in vhdl code the multipliers that i have used in the code is 164 multipliers .As per the fpga there are total 192 multipliers But the synthesis report it shows 148 multipliers and the filter coefficients are symmmetrical.I doubt whether during the optimization of the code the it has reduced the no of mutipliers.Will it effect the final result in the hardware.I use virtex 4 fpga and this hardware HAS 192 multipliers totally.The simulation results of the filter code shows correct result.What is your opinion on this reduction in the no of multipliers?
 

Maybe you're seeing some resource sharing going on. Try turning of any type of resource sharing the the tools and see if the number of DSP blocks used goes back to 164.
 

ads_ee said:
Maybe you're seeing some resource sharing going on. Try turning of any type of resource sharing the the tools and see if the number of DSP blocks used goes back to 164.
Click to expand...

how to turn of the resource sharing in the tools.How to find out where the resource sharing option.is it the option and where it can be found out?
 

I doubt that the tools are smart enough to merge multipliers with the same coefficient. Maybe some coefficients are very simple, like a power of 2.
A multiplier is not needed for them.
 

std_match said:
I doubt that the tools are smart enough to merge multipliers with the same coefficient. Maybe some coefficients are very simple, like a power of 2.
A multiplier is not needed for them.
Click to expand...

I could not understand how a number power of two a multiplier is not needed and could you tell me how to avoid resource sharing among the coefficients .If the coefficients are arranged in LUT will this resource sharing problem can be avoided
 

for example:
01001001 = 0x49
0x49*0 = 0 -- no multiplier needed
0x49*1 = 0x49 -- no multiplier needed
0x49*2 = 10010010 =0x92 -- just a left shift of the input, no multiplier needed.

long filters often have a handful of 0-valued coefficients after quantization.
 

Hi Kannan,

In your co-efficents, do you have 1 and -1? It is so how many co-eff you have? May be because of that, it may reduce.(For 1 and -1 it doesnt require to multiply right?)
 

sureshaa said:
Hi Kannan,

In your co-efficents, do you have 1 and -1? It is so how many co-eff you have? May be because of that, it may reduce.(For 1 and -1 it doesnt require to multiply right?)
Click to expand...

Actually i am having coefficients like FFFE (1111111111111110)and the data multipliying with this coefficints are 90 and -90 only .Whether this reduction in the multiplier will affect the hardware output result
 

Hi Kannan,

FFFE (1111111111111110) is nothing but -2.Like permute said, it doesnt required multiplier for that.
 

sureshaa said:
Hi Kannan,

FFFE (1111111111111110) is nothing but -2.Like permute said, it doesnt required multiplier for that.
Click to expand...

Actually the question are these xilinx synthesis tools intelligent enough to know these coefficients and optimize the no of multipliers?
 

Yeah.. It will try to reduce the multiplier count. If you want to check the tool... just write one eighteen bit multiplier and multiply with "111111111111111110". Now the hardware wont be multiplier. Then change the multiplicant with some random number( which is not 1,-1,2,-2,0, and multiples of 2).Then see the resource utilization.
 


Actually when i kept the numbers like 24,34,36 and other evenn numbers other than the power of two like(2,4,8,16,32.....)it is showing the multipliers used .But when i used(2,4,8,16,32.....) it shows no multipliers are used.
 

kannan2590 said:
Actually when i kept the numbers like 24,34,36 and other evenn numbers other than the power of two like(2,4,8,16,32.....)it is showing the multipliers used .But when i used(2,4,8,16,32.....) it shows no multipliers are used.
Click to expand...

Yes Dude.. You are correct. I will correct my words. It is not multiples of two, It is two^n.;-)
 

sureshaa said:
Yes Dude.. You are correct. I will correct my words. It is not multiples of two, It is two^n.;-)
Click to expand...

Again one more doubt i am having is that if i kept numbers like 7,7,7,7 the no. of multipliers shown is zero.Whether this will have effect on the final output?If yes how to correct it?
 

Multiplication with a power of 2 (1,2,4,8,16, etc) is just a shift. No hardware resources are consumed.

If the coefficient is a power of 2 +/- another power of 2, the multiplication can be implemented with an adder/subtractor. 7 = 2^3 - 2^0

I don't know which tools can take advantage of this.
 


But the synthesis tool or any other tool how can it know that it can be written as 7 = 2^3 - 2^0.Whether you have tried it with vhdl code if it is so can you send that code to me.
 

Kannan2590,

std_math said it can be.. but he is not sure about that. I think u can do these experiments with tool. It wont take that much time.
 

One interesting special case it to multiply by 10.
Since 10 = 2^3 + 2^1, only one adder is needed.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…