About the gain of Operational Amplifier?

[joskin]

When I run simulation of a single stage OP,
in AC analysis,the low frequency gain =200,while when in DC sweep,the slope of output is only 28.
How to explain this phenomenon?
What's the relation of these two gain?
Thanks!

 

[Beetroots]

What exactly are you sweeping in the dc analysis?

 

[ET]

How did u do the DC analysis?
You changed the supply voltage?

 

[mallikarjun]

Hi,

Your sweep signal should be on top bias voltage(common mode signal in case of diferential amplifier). First you have to make sure that all of your transistor are in saturation. First Bias the amplifier and then sweep your input signal on top of common mode. Are you sweeping the input form vss to vdd?

 

[mady79]

Since you have got low frequency gain of 200 during AC analysis ,that means that the common mode voltages are proper and circuit is working fine .If you are getting slope of only 20 during DC Sweep ,that indicates couple of things

1)You are measuring slope in Input common mode range .(First calculate this theoritically and given extreme limits of ICMR and do a .op analysis to check all transistor's are in saturation .Then measure the slope in ICMR range .
2)Some times you have to invert the slope(Depends on which i/p you are sweeping) and this gives you the DC Gain .
3)Last probability could be your ICMR range is too small and you are checking the slope some outside limits of ICMR .

Hope this Helps !!!

 

[joskin]

Thank all for your reply.
I have found the problem.
I set the DC sweep step to 0.001v before.
Now I change the step to 0.00001v and the gain in AC analysis is equal to that in DC sweep.

 

[linxf2003]

Yes, the AC gain is a small signal gain, it is equal to DC gain in a very small range around your DC bias voltage.

 

[jake]

Since you have got low frequency gain of 200 during AC analysis ,that means that the common mode voltages are proper and circuit is working fine .If you are getting slope of only 20 during DC Sweep ,that indicates couple of things

1)You are measuring slope in Input common mode range .(First calculate this theoritically and given extreme limits of ICMR and do a .op analysis to check all transistor's are in saturation .Then measure the slope in ICMR range .
2)Some times you have to invert the slope(Depends on which i/p you are sweeping) and this gives you the DC Gain .
3)Last probability could be your ICMR range is too small and you are checking the slope some outside limits of ICMR .

Hope this Helps !!!

I have a question about ICMR.
when measuring the ICMR range, the diff input transistors and the second output transistor(two stage OPA) are in linear or cutoff. does it right ? when i do .op analysis, all of the transistors are in saturation. Also i find that the output curve vibrates near the Max output range, why?How to improve the ICMR?

 

[ppenday]

choose a very small step size