Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

About Layout and fabrication

Status
Not open for further replies.

preet

Advanced Member level 4
Full Member level 1
Joined
Jan 10, 2005
Messages
112
Helped
7
Reputation
14
Reaction score
5
Trophy points
1,298
Activity points
908
hello all,

Can we define the parameter like thickness of oxide, doping concentration of transistor etc while designing layout.

regards
preet
 

Hi,

I'm not really sure what you're asking. Anyway if I understand well, yes you can define the thickness of oxyde and different concentration and many other things for layout.
It's just take several CAD layer, good programming and understanding of the tekno.
 

No. Just use the design rule and layout it. no the phy parameter
 

Oxide thickness is not controllable in the real sense of the word. It changes with temperature and fabrication conditions. It varies from transistor to transistor depending on the doping profile during the fabrication.

There is a typical, slow and a fast corner for it. A good design should take this process variability into account. VCOs for instance, can be off by as much as 2x in frequency as a result of such variation.

During layout, you just use the DRC rules as pointed out right above this post.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top