shmilyzhyao
Newbie level 3
input offset voltage
Hi,everyone. I am confused about the concept of input offset voltage.
I have designed a fully-differential OTA. I know that the input offset voltage is always introduced in layout due to the unsymmetry or other non-idealities. However, what i am doing is just designing this circuit and simulating it by Hspice, which is not related to the layout procedure. Need I find the input offset voltage of the circuit before measuring any AC performance such as open loop gain?
In a word, does the input offset voltage exist in the procedure of SPICE simulation? If so, what is the causation?
Can anybody help me?
THX in advance!
Hi,everyone. I am confused about the concept of input offset voltage.
I have designed a fully-differential OTA. I know that the input offset voltage is always introduced in layout due to the unsymmetry or other non-idealities. However, what i am doing is just designing this circuit and simulating it by Hspice, which is not related to the layout procedure. Need I find the input offset voltage of the circuit before measuring any AC performance such as open loop gain?
In a word, does the input offset voltage exist in the procedure of SPICE simulation? If so, what is the causation?
Can anybody help me?
THX in advance!