about high speed D/A and VGA RAMDAC design

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andy2000a

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Hi
How to design a > 200MHz buffer for current D/A convert ??

which can tell me where can I find document about VGA RAMDAC

thank you
 

U can search for IEEE paper for some high speed opamp topologies..
If u want me to post any specific paper let me know.
 

Hi,ti and maxim have some application about high speed d/a converter
 

I know the problem .. I design a current DAC .18um
but current too small ~uA ...
and someone tell me VGA RAMDAC have large current scale
~ 17mA and driver 50 ohm load (swing < 1v) ..

If I large my DAC current , I think I can make it


thank you
 

In RAMDAC design, its spec need a 17~19mA current to drive
an 37 Ohm resistor (double terminaled by 75 Ohm).
In general design, we will use a V to I circuit to generate a current
source and mirror it to a set of current cell controlled by the
opposite digital code.
So if you want to design this VGA DAC, I think you may change your
design meet the output current requirment. Becuase you will find
many issue when you need to operate in high speed.
And also remeber you will need three DACs for R G B channel.
 

I think andy's question is how to design a "de-glitch" circuit for the high
speed current-steering DAC, right?
 

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