about doubt in the topic of cic

kannan2590 said:

I am doing a project in matlab simulink. I am giving input to cic filter a fixed wordlength 24 bit and fractional length 23.now i am setting the parameters in the cic interpolation block in matlab simulink with interpolation factor 8,differential delay M=1,no of sections as 9 and i am using zero latency interpolator.Now when i checked the ouput of cic interpolation block it was 38 bit wordlength and 12 bit fractional width.

Now if i want to write a vhdl code for this what should be the output width of cic filter . i have specified the input width as 24 and the output width to be also 24 and fractional length to be 23.whether what i have done is correct ?if no tell the necessary changes that should be made?

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K-J said:

If your goal is to match Simulink, then the answer is pretty obvious. If that is not your goal, then nobody can answer your question since we don't magically read your mind as to what your goals may be.

Kevin

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