about bandgap design,

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arsenal

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hi all,
i wanna design a bandgap with power supply varies from 3.6 to 1.5v , using 0.13u tsmc, and should consume no more than 15ua current, my concern is the psrr and the break down voltage of the transistors, i wanna use a regulator to down convert the power for the core of the bandgap, thus i can get a high psrr and avoid the breakdown problem, however, this may fail when power decreases to 1.5v.
thanks a lot, your ideas are welcome.

regards,
arsenal
 

hi

is it voltage reference or current reference??? what is the breakdown voltage of your transistor?? is it collector emitter breackdown voltage?? if yes then you try to adjust always collector emitter voltage less than VCEBO. if it is possible then you can upload your ckt... then we can try it more details....

bye.
 

dont worry about it. the 0.13u tsmc process have I/O cmos process whose operation voltage is 3.3V
 

hi sunking,
u mean i can just use the io device? what is difference in the circuit where low voltage device is ok while i use io devices instead?
and io devices in 0.13u differs much with that in 90nm? and how about the leakage current？

thanks
 

of course you can. the major is the supply voltage is 3.3V.
More you can contact tsmc
 

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