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Increase the current in the BJT diode. this is only way you could increse the VBE.
Plot the BJT diode transfer characteristic. From that u can get the vale of current to be pumped to get desired Vbe.
Better is u could use PMOS input pair for the amplifier.
Much simpler
Simplest way to implement it is to use a level shifter. Use two PMOS source follower configurations for the input. As long as the source followers are on, you will get a VTH increase in the voltage to your differential pairs. Bias them so that you have a desired voltage for the input differential pair.
Simplest way to implement it is to use a level shifter. Use two PMOS source follower configurations for the input. As long as the source followers are on, you will get a VTH increase in the voltage to your differential pairs. Bias them so that you have a desired voltage for the input differential pair.
I would be careful with the use of a level shifter. Make sure that it does not introduce in-band noise for your reference. For best noise performance, keep the number of devices that can contribute noise low. The level shifter can be one of several options:
- Place matching devices between M1 and R1 and between M2 and Q2. Take the voltages for the amplifier inputs from the more positive connection. Device can be a resistor, a diode connected NMOS, PMOS or bipolar. Since the currents in each will be the same, they will provide the same voltage drop, and will increase the voltage input to the NMOS input pair on your opamp.
- Use a follower device before the input to the opamp.
Depending upon your supply voltage, p-channel inputs to the amplifier might be the best solution, since it will probably not add any new devices for noise contribution.
Bipolar inputs to your amplifier might work, but I am guessing that your process will not support it?
I would be careful with the use of a level shifter. Make sure that it does not introduce in-band noise for your reference. For best noise performance, keep the number of devices that can contribute noise low. The level shifter can be one of several options:
- Place matching devices between M1 and R1 and between M2 and Q2. Take the voltages for the amplifier inputs from the more positive connection. Device can be a resistor, a diode connected NMOS, PMOS or bipolar. Since the currents in each will be the same, they will provide the same voltage drop, and will increase the voltage input to the NMOS input pair on your opamp.
- Use a follower device before the input to the opamp.
Depending upon your supply voltage, p-channel inputs to the amplifier might be the best solution, since it will probably not add any new devices for noise contribution.
Bipolar inputs to your amplifier might work, but I am guessing that your process will not support it?
Dear Incol,
It is not necessary to have the same design as the author. You could have the same architecture, i.e. using an amplifier. to keep the two node voltages same. But if your technology doesnot support low, Vt devices then why go for NMOS input pair. Also it is believed that PMOS has better noise performance compared to NMOS so take the advantage of that.
What is intresting in the complete discussion is various methods everyone has contributed to solve the issue and corresponding advantages and disadvantages of each.
Also Ka Nang Leung in his paper has suggested a PMOS input pair structure also this paper "A Sub-1-V 15-ppm/ C CMOS Bandgap Voltage Reference Without Requiring Low Threshold Voltage Device" I suppose is what u are reffering for your design.
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