a serial bug about proteus6.1?????.Help!

[RogueRabbit]

proteus simulate program fetches

I have found a serious problem about Protues VSM 6.1sp1.
That is:there is no ALE signal on 8051 unless use "movx @dptr,a" and "movx a,@dptr".
In fact,the ALE signal is always in existence.It's frequensy is 1/6 of clock frequensy
of 8051.This may be cause many problems.

 

[james]

There are a couples of inaccuracies in what you said.

First of all, is not fully true that ALE is actives in every conditions. The ALE signal (Address Latch Enable) together with PSEN (Program store enable), RD and WR (alternate functions of pins P3.7 and P3.6) give the access to two type of external memory operations; accesses to external program memory and accesses to external data memory. Particularly, ALE signal is used to demux and latch (on ALE falling edge) the low byte address into an external latch (usually 74HC373). So, only instrunctions requiring external code or external data fetches will cause the proper transitions activities of ALE and above related signals. As correct as you said, all MOVX op instrunctions are in this category.

However, 8051 used as single chip application, that is without any type of external memory (I mean, using internal PROM, or FLASH as code memory and idata as data memory) will not use at all ALE, PSEN, RD and WR. Indeed, in this condition you can use RD and WR as I/O ports pins, P3.7 and P3.6.
The 8051 model which is implemented in proteus (all proteus version since the 5.2) has been optimized for single chip applications, to say that, the program you create is loaded by default in internal chip memory. So, unless strictly required from the application itself and obviously, from external data accesses you program does, the ALE will be never activated and because to improve simulation performances, the address and data bus activities for external memory has reduced at minimum. However this will not affects on behaviours your application will performs in realty. If you need to fetch code in external memory (i.e. EPROM) you can always set the full bus activities (at expence of simulation performaces) if you open "Edit Component" dialog and set "Yes" to "Simulate Program Fetches".

The second inaccuracy is about ALE frequency. ALE frequency is 1/12 of clock, that is one machine cycle, or that the same 1us at 12MHz clock. This is true for all "classic" intel 8051 cpus and derivates which does not make use of X2 option. Atmel and Philips (for example Atmel AT89C51RD2 is one supporting the X2 option) and many others vendors like Dallas (MAXIM now) makes use of X2 option which reduce the machine code from 1/12 to 1/6 of clock, improving the speed with same clock frequency. However, for what I know, Proteus doesn't support yet X2 mode.

You can download tons of documentation from:

https://developer.intel.com/design/mcs51/docs_mcs51.htm

I suggest https://developer.intel.com/design/mcs51/applnots/01502a01.htm and https://developer.intel.com/design/mcs51/manuals/272383.htm for a full description of MCS51 hardware and ALE functionalities.

Hope this helps