Just imaging Vdd going up faster that the RC can follow. Then, the twon inverters have a known state and both inputs of the EXOR have the same value, making its output to be "0". When the voltage accros the capacitor is enough to make the first inverter to toggle, the the second inverter does it and then one of the EXOR inputs changes its state. This makes the EXOS to toggle its output. Once the signal has propagated also through the delay element, both EXOR inputs have again the same value, making the EXOR output to be "0" again. So, the EXOR output made a short (the length of the delay element) positive pulse used as POR.
Did you catch it?