A question about slew rate

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wjx197733

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cap loading slew rate

When I read the book writed by Allen, there has a sentence in chapter 6:

" Normally, slew rate is not limited by the output. but by the current sourcing/sinking capability of the first stage"

I don't know why
 

The statement is only true for single-stage amplfier (such as folded-cascode or telescopic). For two stage amplfier, the slew rate does depend on both the input stage bias current and output stage source/sinking current capability.
 

I must say that I do not think so. IN the book writed by Allen, the sentence in chapter 6 is:
" Normally, slew rate is not limited by the output. but by the current sourcing/sinking capability of the FIRST STAGE"

Please attention the word:" FIRST STAGE", so I think the OP can have two stage.
 

It is assumed that the output stage current is bigger(such as class AB), and the cap of load is not very big
 

Hi, sunking, Can you tell me detail? what is the meaning of "class AB"? Why "the output stage current is bigger(such as class AB), and the cap of load is not very big" can cause the slew rate to be not limited by the output. but by the current sourcing/sinking capability of the first stage
 

The compensating capacitor is frequently the cause of the limiting. The stage that drives the stage compensated usually has low current.
 

I think the book should contain not only the conclusion,but also the analysis.Read the chapter again, you can find the answer yourself.
 

hi, wjx197733
I agree marshel.
 

it's caused by the miller effects.
since the compensation capacitor's equavilent cap is about A2*C1 (although A2 is frequency dependent, we assume A2>>1), the current of first stage is not much larger. In most amplifier I1/(A2*C1) < I2/CL , thus the slew rate is depends on the first stage.
 

wjx197733,

" Normally, slew rate is not limited by the output. but by the current sourcing/sinking capability of the first stage"
Click to expand...

Yes, but in the case of a basic two-stage op-amp. Slew rate is limited by current available from the input stage to charge/discharge the compensating capacitor, Cc.

SR = ICc/Cc, where ICc is current through Cc. And ICc is also 2.ID, where ID is drain current of PMOS or the push transistor in the push-pull output stage.

Therefore SR = 2.ID.ω/(√2.µp.Cox.ID.W/L) = Vov.ω
where Vov = Vgs-Vtp and ω = ωt/β
where ωt is unity-gain or transition bandwidth, β is the feedback gain
 

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