A problem about two-stage OpAmp

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zouwanghui

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I'm confused about the two-stage opamps in the picture. I found the circuit on left is always used, and the right rarely used. I want to know the difference about the two! Thx **broken link removed**
 

Consider the DC operating point of both circuits. The second-stage's gate voltage is VDD-|VDS(MP4)|, and approx. equals to VDD-|VGS(MP3)|. This voltage is what the left-hand figure needed. In the right-hand figure, however, the Vgs of the second stage's MOSFET will be much greater than Vthn, and changes with power supply -- VDD. This is not desirable.
 

The angle of the output waveform is inverted in each case

Barrybear
 

If the second current source (below Mp5) is half the value of the first current source, then when negative feedback will stabilize the circuit in equal currents in Mn3 and Mn4, Vgs of Mp5 will be equal to Vgs of Mp3, and so Vds of Mp3 will be equal to Vds of Mp4 and the input circuit will be in perfect balanced state, currents and voltages, which will improve its performance.
 

In the figure shown in left, Same current generator cud be used for both current sources while in the figure shown in right extra PMOS NMOS conversion is required.Moreover There will be surely some biasing issues with the right one.
Infact I have never seen the topology shown in right figure.
 

I think it will help u.

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