how to calculate the setup and hold time ,thanks

[straw]

hold time calculation

Given the following design,reference the figure
1.What are the effective setup and hold times between IN and CLK in the above circuit?

A. Tsetup = 4 ns, Thold = 1 ns
B. Tsetup = 3 ns, Thold = 0 ns
C. Tsetup = 3 ns, Thold = 1ns
D. Tsetup = 2 ns, Thold = 0 ns

2.What is the maximum operating frequency of the above circuit?

A. 250 MHz
B. 80 MHz
C. 125 MHz
D. 166.7 MHz

 

[satyakumar]

setup and hold time calculation

Hi,
I think C is the corect answer for efective setup time and hold time, max frequency is 166.7MHz.
Tsetupeff=TclkFFQ+(Txor-Tclkdelay)-Tsetup
Tholdeff=(Txor-Tclkdelay)
TP=TclkFFQ+(Txor-Tclkdelay)+Tholdeff

 

[straw]

setup time calculation

thanks very much,I want to ask a question,the effective means slack ,is it right?thanks

Added after 4 minutes:

could you use the timing sequence figure to explain to me?thanks

 

[gck]

calculating setup and holdtime

Hi,

I have a good ppt for setup and timing analysis. Pls refer it which will help u lot

 

[straw]

how to calculate setup time

thanks,the ppt is very good ,could you upload others ppt?
another question:from the ppt ,I want to ask,we don't know the period of clk ,how to calculate the tsu and thold?

from the ppt,the page 26 I think
the tsueffective=txor+tsu-tclk=2+2-1=3
theffectiv=th+tclk-txor=2+1-2=1.
is it right?

 

[liushengwei]

setup and hold time questions

hi
for the first one , i think b is the correct answer
as the time from d to q is quite enough for it to hold
there is no need to hold

 

[shockie]

maximum operating frequency for 74ls04

As of hold time, we are talking about IN ->Q, the orginal Th=2ns, for path Q to Q, hold time is fine. but for path IN to Q, even though we have Tp_xor=2ns, but we still have 1ns clk skew, so, the new hold time for IN shoul be met: 1ns.

 

[amolpukale]

calculating setup time

Hey Star,
The presentation is very useful. Did you come up with it yourselves ?

Anyway.. thanks for uploading it.

 

[avimit]

setup hold time calculation

Beautiful question. I will give it a question of the year award. The answers are:
The answers are;
1. (c)
2. (c)

Kr,
Avi
http://www.vlsiip.com

 

[Wenf.Yeh]

calculate maximum operating frequency for 74ls04

Hi gck:
may you email me the others ppts?
my email: arthurs.yeh@gmail.com
thx a lot!

 

[amitjagtap]

calculate hold time

can somebody plz tell me whether effective setup and hold time are same as Tset(slack) and Thold(slack).
if not what they are?
Amit

 

[mouzid]

how to calculate average hold time

Hi,

A very interresting question and response !
Can some one sent me ppts ?
My e-mail:master_picengineer-at-yahoo-dot-fr

Thanks,

 

[vamsi_addagada]

how to calculate the setup time

hi
that is max frequency is the 125 mhz
f=1/t=1/clk to q+combination delay+setup time

vamsi

 

[winder]

calculate setup time

this question quzzles me a long time ,and now i find the answer.

 

[abzrh]

calculate frequency using setup time

Folks,
I can't download the file 13[1].SeqCktTiming.ppt because I don't have enough points as a newbie.
Can someone please email it to me at
abzrh(at)hotmail(dot)com

Thanks!!

Added after 59 minutes:

Folks,
I can't download the file 13[1].SeqCktTiming.ppt because I don't have enough points as a newbie.
Can someone please email it to me at
abzrh(at)hotmail(dot)com

Thanks!!

 

[ccj507]

how to calculate gate in a hold

i have a problem about this question too...

 

[kichhu]

setup hold time questions

Can someone elaborate more on calculating the max clock frequency...
Even I think it should be 125Mhz...so for those who gave the answer as 166...can u plz explain how u got it?

 

[jimaaa0]

hold time average calculation

i think the answers of these questions are C.
Tc=Tclk-q+Txor+Tsetup=4ns+2ns+2ns=8ns,so the f=125MHz.right?
hi,gck.
could you mail your ppt to me? I can't download it because my point isn't enough.
my email :jimaaa0@gmail.com

 

[pra]

how to calculate adc hold_time

its nice to c this question on this forum!!

some of the answers are right some are wrong!

A small ext question from my side!


Suppose if the delay of the NOT gate is 4ns ! Then what will be the result of the above question!!

This will explains most of them who are wrong with their approach!

- Pra

 

[hfooo1]

how to calculate holding time

hi
if the delay is 4ns
i think setup time is 5ns and hold 0ns
frequency is also 125mhz

is it r?