8 bit LCD interfacing with PIC 18F4523

[gandhali]

Hello everyone,
I am working on PIC 18f4523 with mplab X IDE XC8 compiler. I am using 16x2 LCD which is connected to PORTD, and the RS, RW, EN pins of LCD are connected to PORTB.
I have written simple code for LCD interfacing and there is no any syntax error in my code. The code builds successfully, but when I am trying it on hardware the back light of LCD only glows. that means there is some problem in initialization of LCD. I am attaching my code. so please help me to get out of this problem.

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Code C - [expand]
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#pragma config OSC = INTIO67    // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
 
// CONFIG2L
#pragma config PWRT = ON        // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = ON       // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
#pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)
 
// CONFIG2H
#pragma config WDT = ON         // Watchdog Timer Enable bit (WDT enabled)
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)
 
// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
 
// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
 
// CONFIG5L
#pragma config CP0 = ON         // Code Protection bit (Block 0 (000800-001FFFh) code-protected)
#pragma config CP1 = ON         // Code Protection bit (Block 1 (002000-003FFFh) code-protected)
#pragma config CP2 = ON         // Code Protection bit (Block 2 (004000-005FFFh) code-protected)
#pragma config CP3 = ON         // Code Protection bit (Block 3 (006000-007FFFh) code-protected)
 
// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = ON         // Data EEPROM Code Protection bit (Data EEPROM code-protected)
 
// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-001FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (002000-003FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (004000-005FFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (006000-007FFFh) not write-protected)
 
// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
 
// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
 
// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block (000000-0007FFh) not protected from table reads executed in other blocks)
 
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
 
#include <xc.h>
#define _XTAL_FREQ 4000000
 
#define LCD_RS PORTBbits.RB0
#define LCD_EN PORTBbits.RB1
#define LCD_RW PORTBbits.RB2
#define LCD_D0 PORTDbits.RD0
#define LCD_D1 PORTDbits.RD1
#define LCD_D2 PORTDbits.RD2
#define LCD_D3 PORTDbits.RD3
#define LCD_D4 PORTDbits.RD4
#define LCD_D5 PORTDbits.RD5
#define LCD_D6 PORTDbits.RD6
#define LCD_D7 PORTDbits.RD7
 
#define CLRSCR     0x01
#define DISPLAY_ON 0x0C
#define DISPLAY_OFF 0x08
#define CURSOR_ON 0x0A
#define CURSOR_OFF 0x08
#define CURSOR_INC 0x06
#define MODE_8BIT 0x38
#define MODE_4BIT 0x28
 
void lcd_cmd(unsigned int c)
{
    __delay_ms(300);
    LCD_RS = 0;
    LCD_RW = 0;
    LCD_EN = 1;
    PORTD = c;
    __delay_ms(100);
    LCD_EN = 0;
    __delay_ms(100);
    
    LCD_RS = 0;
    LCD_RW = 0;
}
 
void lcd_data(unsigned char c)
{
    __delay_ms(300);
    LCD_RS = 1;
    LCD_RW = 0;
    LCD_EN = 1;
    PORTD = c;
    __delay_ms(100);
    LCD_EN = 0;
    __delay_ms(100);
    LCD_RS = 0;
    LCD_RW = 0;
}
 
void lcd_init(void)
{
    __delay_ms(300);
    LATD = 0x00;
    TRISB = 0x00;
    LCD_RS = 0;
    LCD_RW = 0;
    LCD_EN = 0;
    __delay_ms(100);
    lcd_cmd(CLRSCR);
    __delay_ms(10);
    lcd_cmd(DISPLAY_ON);
    __delay_ms(10);
    lcd_cmd(CURSOR_ON);
    __delay_ms(10);
    lcd_cmd(CURSOR_INC);
    __delay_ms(10);
    lcd_cmd(MODE_8BIT);
    __delay_ms(10);        
}
 
void main(void)
{
    TRISD = 0x00;
    TRISB = 0x00;
    lcd_init();
    while(1)
    {
    lcd_data(' ');
    lcd_data(' ');
    lcd_data(' ');
    lcd_data(' ');
    lcd_data('H');
    lcd_data(' ');
    lcd_data('E');
    lcd_data(' ');
    lcd_data('L');
    lcd_data(' ');
    lcd_data('L');
    lcd_data(' ');
    lcd_data('O');
    
    }
    return;
}

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[betwixt]

Just a guess as I don't have any data sheets to hand at the moment - your 'lcd_init' sets the mode as the last step, it should probably be the first step.

Brian.

 

[andre_luis]

#pragma config WDT = ON

You have enabled the watchdog reset counter, but you are not refreshing it anywhere, what means that your program is being continously restarted. By taking an overview on your coding style, I would bet that there are more functional errors. I recommend to make use of some demo code for that; it is a simple task to write a string on LCD, there are many sample codes available, even here on Edaboard old threads.

 

[Aussie Susan]

You have not followed the correct initialisation sequence for the (I assume) HD44780 controller (that is used in many of the parallel interface LCD displays of the type you mention).
The initialisation sequence is critical and you will not get anywhere without following the sequence and timing properly.
It is a while since I wrote code for one of these interfaces but (apart from the initialisation section) I don't remember having to put in all of those delay function calls when sending commands and data.
Also I think you are mishandling the enable line - you need to set everything up and then send a short pulse (order of uSec) on the enable line.
The MCU you are using has LAT registers and you should be using those to avoid the RMW problems - if you don't know what that means then look it up.
Susan