Anandt88
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hi,
I am currently working on an FPGA implementation and interfacing with an ADC and a DRAM which is of high speed and i am stuck in a part where i am not able to find suitable material on the interfacing technique of ADC with FPGA and DRAM with FPGA...
i need to send the output of ADC with 8-bit resolution to a 32bit DRAM (it can be either DDR or DDR2/3)
the sampling rate of the ADC is 1GS/s.
I am currently working on an FPGA implementation and interfacing with an ADC and a DRAM which is of high speed and i am stuck in a part where i am not able to find suitable material on the interfacing technique of ADC with FPGA and DRAM with FPGA...
i need to send the output of ADC with 8-bit resolution to a 32bit DRAM (it can be either DDR or DDR2/3)
the sampling rate of the ADC is 1GS/s.