JFET as variable resistor

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fet variable resistor

can anyone help me, am trying to desing a circuit with a JFET that act like a variable resistor, or if you have any other idea to making a resistor change by changing voltage

 

[IanP]

fet as variable resistor

"The Field Effect Transistor as a Voltage Controlled Resistor"
**broken link removed**

"JFET variable resistor"
**broken link removed**

Regards,
IanP

 

[ionp]

mosfet variable resistor

As the gate is reverse biased relative to the channel (the conductor between the gate and source leads) the current is pinched off, making an increase in effective resistance.
If the gate voltage is varied relative to the source lead, you will get approximately the effect you are looking for. If you make an equal value 2 resistor divider from drain to source, and vary the gate voltage relative to its junction, AC distortion is reduced.

There are also opto couplers where an LED drives an FET gate all within an IC.

 

[sec]

jfet variable resistor

well thank to both of you, I will try that and re-post if I've got other question.

 

[sec]

voltage variable resistor

this is my JFET, can you help me analyse the "setting" like the pinch-off voltage, and all the graphics. There is, in the datasheet, the ( ID - VDS ) graph, but the pinch-off voltage doesn't appeir ... is the ( ID - VGS ) the pinch-off voltage ???

 

[Gundam001]

fet resistor

See attached file for your reference..

The 2SK30ATM acts as a voltage variable resistor with an RDS(ON) ranges from 1500 ohm to 33k ohm max (I'm not sure about the range just check again). The 2SK30ATM JFET will have linear resistance over several decades of resistance providing an excellent electronic gain control.

Just control the your VGS and you can attain a variable resistance..

 

[sec]

fet as resistor

here is what I would like someone to explain me in fonction of the data sheet. But I really love the schema you brought me, is there an formula that goes whit it

 

[Eugen_E]

fet as a variable resistor

In the ohmic region (yellow) the characteristic of the jfet is linear,as the drain current IDS is proportional to VDS. So the jfet acts like a resistor (I=V/R). This is the case only if the VDS is low enough, much lower than |VP|. If this condition is not acomplished, the characteristic is not linear, and the jfet will introduce distorsion.

In the saturation region (green) the drain current is (almost) constant with VDS. In this region IDS depends only on the VGS, and output dynamic resistance of the jfet is very high. In the saturation region IDS depends greatly on VGS, and jfets used in amplifiers are biased in this region.

The schematic provided by Gundam001 shoud work great, but I think the source and drain of the jfet should be inverted. The non inverting input of the opamp is virtualy grounded, so VS=0, VGS=-V(Gain control). The amplification of the opamp is A=-R2/(R1+Rjfet), and Vout=Vin*A.

If you eliminate R1: Vout=-Vin*(R2/Rjfet).
Rjfet=VP^2/(2IDSS(VGS-VP))

Vout=-Vin*R2*(2IDSS(VGS-VP))/VP^2

 

[Gundam001]

fet as voltage variable resistor

See Attached, the formulas needed are listed below. You can reconfigure the circuit to act as a non-inverting amplifier.

R1 should not be eliminated, coz this will set the maximum output voltage that will be produce by your amplifier or as required by your circuit.

I think your good enough to manipulate those formula to achieve your desired output.

 

[sec]

jfet resistor

As I under stand this is the pinch-off of my JFET, it's when the current slow down to grow. but what is (if there is one) the formula to find the pinch-off ?

 

[Gundam001]

variable resistance mosfet

I think the pinch off voltage can be found in the datasheet..

The pinch off voltage is the maximum Gate-source voltage that the JFET can handle.

so as seen in the datasheet, the maximum VGS is -30V so the VP is also -30V.

 

[sec]

jfet as variable resistor

what I see is -50V and -30V, wich one means what ?

 

[diemilio]

mosfet as variable resistor

The datasheet would give you a range of possible values for the pinch off voltage. One of the reasons of why JFETs are not that popular is that parameters of components of the same family vary a lot. I would recomend you to characterize the component you're planning to use to find the exact Vp value.

 

[sec]

mosfet variable resistance

I will change my JFET for an 2N3918 witch is more recent and the data sheets more complete

 

[sec]

fet as a resistor

what I see make me think that: VP is VDS when VGS = to 0V
and IDss is ID when VGS is saturate
am I right ?

Added after 31 minutes:

and is the pinch-off voltage the same thing as the pinch-off locus ?

 

[diemilio]

variable resistor jfet

IDSS is the current measured when Vgs=0 and you're in sat region. Your graph shows a IDSS of almost 12 mA.
Vp is the difference between Vgs and Vds necesary to pass from sat region to triode. When Vgs-Vds=Vp you're in the triode-saturation limit.

 

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fet as variable resistance

what is the difference between P-channel and N-channel JFET ?

 

[unkarc]

fet resistance variable

Hi,

You can read the difference at this link:

**broken link removed**

Also a useful link on JFETs is here:
**broken link removed**

Regarding your earlier question on the pinchoff voltage, I attached a simple schematics on how to measure this pinchoff voltage in practice.
You need a DC power supply (or 9V dry battery or 12V battery etc) and a DVM besides the JFET. Usually a digital voltmeter has got a 10 MOhm internal resistance which surely blocks any current flowing through the Drain Source channel and you can directly read the Vp of your JFET from the DVM (use 10 or 20V measuring range).
You may use this same circuit to measure IDss of this same JFET (max drain current at zero gate source voltage) by arranging the DVM to measure DC current (switch off power supply while unplug/plug the test wires on the DVM).

rgds
unkarc

 

[diemilio]

jfet voltage variable resistor

Hi,

You can read the difference at this link:

h**p://www.macom.com/Application%20Notes/pdf/an211arev0.pdf

Also a useful link on JFETs is here:
h**p://www.colorado.edu/physics/phys3330/phys3330_fa04/pdfdocs/AN101FETintro.pdf

Regarding your earlier question on the pinchoff voltage, I attached a simple schematics on how to measure this pinchoff voltage in practice.
You need a DC power supply (or 9V dry battery or 12V battery etc) and a DVM besides the JFET. Usually a digital voltmeter has got a 10 MOhm internal resistance which surely blocks any current flowing through the Drain Source channel and you can directly read the Vp of your JFET from the DVM (use 10 or 20V measuring range).
You may use this same circuit to measure IDss of this same JFET (max drain current at zero gate source voltage) by arranging the DVM to measure DC current (switch off power supply while unplug/plug the test wires on the DVM).

rgds
unkarc

You could use a capacitor instead of a resistance to garantee that there's no current flowing. The cap would charge to Vp's value.

 

[sec]

jfet variable resistance

how can I know the pinch-off with a cap ?

unkarc, I did what you suggest me to do and here are my result for an 2sk168
For a VDD=9,76V the pinch-off is 9,54
For a VDD=4,70V the pinch-off is 4,27
For a VDD=1.06V the pinch-off is 1.06V
For a VDD=14.27V the pinch-off is 14.27

How to know which one to chose, is it always at a VDD of 10V the the pinch-of is calculate?