davyzhu
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Hi all,
reg[7:0] register; (Verilog)
The register contains data like
[0 0 0 1 0 1 0 1]
And I want to know the number of the zeros before the first 1
(in this example is 3 zeros).
How to do this in a combinational logic?
All the logic have be done in Verilog
Best regards,
Davy
reg[7:0] register; (Verilog)
The register contains data like
[0 0 0 1 0 1 0 1]
And I want to know the number of the zeros before the first 1
(in this example is 3 zeros).
How to do this in a combinational logic?
All the logic have be done in Verilog
Best regards,
Davy