500W Full Bridge converter at 250kHz and no significant input capacitors?

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Hi,
I have been given a Full Bridge SMPS from a customer, to bring up.
It is 115VAC input,
Then CCM Boost PFC at 200kHz.
The output capacitance of the PFC is 94uH....thats five series tantalum electro's in series (!!!)

PFC output cap TWA_E-890185...

This tant cap, has virtually zero capacitance at the 250kHz switching frequency of the Full Bridge SMPS. (the Full Bridge is just downstream of the PFC)

Even these five_series_tantalums are not on the same PCB as the Full Bridge.
They are on a daughter board which is connected to the main PCB via a pin header connector.

There are literally no other capacitors at the input to the Full Bridge.

I have been told "tough luck", just get on with it. There is virtually no room on the Main PCB to solder in extra capacitors.

The Full Bridge is Fsw=250kHz, Vin = 275vdc, (and this vin has 58Vpkpk ripple at 120Hz), 28Vout.

Would you agree this is a total joke?......have you ever run a 500W, 250kHz Full bridge with virtually no input capacitance?...(at the switchign frequency of 250kHz the TWA_E-890185 capacitors have virtually zero capacitance.
 
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94uF @ 275VDC sounds a reasonable amount of capacitance so i wouldn't say theres no capacitance. The job of the capacitor is to control voltage ripple so you should be able to calculate the approximate voltage ripple yourself using i=C dv/dt based on your knowledge of the 2nd Stage as a load. Assuming the capacitance is ok to keep the voltage ripple to a reasonable level i'd also suggest checking the current ripple as typically the output caps have a requirement for low ESR and suitable current ripple rating.
 
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Thanks,
Please see fig 1.1.4b of the following (page 155)

...my apologies, i should have shown this before...i now believe you will be as shocked as i am.

The one we are using is TWAE477x100

Have you ever seen a capacitor whose capacitance drops with frequency like that? Wow....at 250kHz its going to have approx zero capacitance if we're lucky....!...and thats all we have to act as input capacitor to our 250kHz , 500W full bridge.!..even worse is that for us, they have put five of these caps in series.
 

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I'm not actually sure what test they used for determining that as they don't disclose that information in the document but the output of a boost converter is DC with an AC ripple content so not truely AC so i'm not sure how the graph is intended to be interpreted in this case. I can only suggest that in this instance, as you are doing this in a professional capacity you ask the designer for the data and rational used to select the part to evaluate it in more depth, also point the designer to this data for their input. Part of comissioning circuits is identification of issues to be rectified so based on your finding produce a report so take precautions with suitable PPE if your unsure.
 
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I beg your pardon, in the top post, the part number of the cap is TWAE477x100
 

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I'm unable to determine the exact capacitance amount at 200 kHz respectively 500 kHz (the ripple frequency fundamental of a 250 kHz full bridge) from TWA capacitance diagram. But it should be still sufficient.

If so, and the total LF + HF ripple current also stays within ratings, there's no problem to implement the design as requested. Down converter must be able to compensate the DC link ripple, e.g. by means of voltage feedforward.
 
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I'm unable to determine the exact capacitance amount at 200 kHz
Click to expand...
Thanks, though can you confirm that the capacitance of this 470uF capacitor at 200kHz will be less than 10uF?
...the graph at Fig 1.1.14b of pg155 of the below appears to confirm this....


...and from this graph, you can also say that the capacitance at 200kHz, could, in fact, be less than 1uF.?...not possible to proove from the graph for sure...but "it could be"?

..And in such a circumstance , having five of these in series for the only capacitance in the DC link between a 500W full bridge and a PFC sounds like a really bad idea? (There are literally no other capacitors on the said link, not even so much as a 10nF axial ceramic.)
 

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Thanks, there are 5 in series, so 10uF for each one means 2uF total.
Even then, it may be well under 10uF for all we know...so the actual capacitance could be , say , just 100nF total.
....As such, can you confirm that this capacitor is a bad choice?
Would anyone choose to do it like this?

These 5 axial tant's , are not even on the same PCB as the full bridge and the PFC....they are on a daughter board, connected to the main PCB by a small pin header. There are literally no caps on the DC link between FB and PFC, on that FB/PFC board.

This surely seems like a design of madness?
 
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Putting it another way...
Looking at Fig 1.1.4b of pg 55 of the following


...Surely if anyone would pick a 470uF,100V capacitor in that family (TWA) for an input capacitor for a 250kHz Full Bridge SMPS, then that individual would be deemed "not of sound judgement", to say the least?

(Not forgetting , its actually five of these 470u,100V caps in series, and they are Axial)
 

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200kHz boost and 250kHz down converter both require very tight layout with film foil and/or 1812 MLCC's of 630VDC or more as part of the tight layout to minimise di/dt radiation and of course, overshoot at turn off.

Without a very tight layout and quality parts operation at 500W is really doomed to failure.
--- Updated ---

it is easy to draw a schematic - not so easy to supply something that works at stated required full power for any length of time that meets emc.
--- Updated ---

it is easy to draw a schematic - not so easy to supply something that works at stated required full power for any length of time that meets emc.
 
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Why are you sending the same link and asking the same question three times?

Forget frequency dependent capacitance for a moment, operating the bridge without a low inductance cap, at least 1 uF is probably the real problem. However what's your actual question? Putting the design to work somehow or modify it according to state of the art?
 
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Thanks, many count the Wet tants from above as adequate "input capacitance" for the full bridge
 

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My interpretation of the "frequency dependence of capacitance" is that the ESR of the cap starts to dominate its overall impedance at high frequencies. At high frequencies, the overall impedance will be much higher than an ideal capacitor, as if the capacitance had decreased.

That's a pretty dumb way of representing the effect of ESR on impedance vs frequency (there's a big difference between a capacitor with impedance of -1j and a resistor with impedance of 1). But that's the only plausible interpretation I have of those plots. I'm not aware of any type of capacitor whose capacitance actually changes so drastically with frequency (when taking the phase of the impedance into account).
 
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Thanks, ..and the plot referred to in the post #3 above shows massive reduction in capacitance at just 4kHz.
..This to me shows a very odd capacitor....totally unsuitable for SMPS use, where switching frequencies are around 20-300kHz at least?
 

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As mtwieg explained, drop of capacitance is a mathematical correct but technically meaningless interpretation of the curve. It's just dominant ESR. The actual impedance curve isn't very different from standard aluminium electrolyt capacitors, by the way.

As a first order estimation, an ideal capacitor with constant ESR of e.g. 0.5 ohm should model the behaviour well. For exact results, an RC ladder model can be fitted to the curves.

Check how your inverter behaves with these high ESR input capacitors.
 
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