50 ohm termination trouble

[big_fudge98]

Hi, I have designed an IC which I wish to test. I had a company design a PCB form me with all the traces terminated with 50 ohms and connected to headers.
The inputs to these headers will be provided through a function generator and a Zedboard FPGA. The frequency of my test signals are small (<10 MHz).

I recently realized that I do not actually need 50 ohm terminated traces, but it's too late to change that now. My question is, would this termination affect my input voltage level.
For example, the FPGA gives an output high of 3.3 V. Would the signal reaching my IC have a voltage high of 3.3 V?

I'm a noob here..

 

[FvM]

What kind of termination are you talking about? Source side series termination would be fine. It gives full logic level into a high impedance load, e.g. a CMOS input. For exact impedance matching, the FPGA output impedance must be considered in the calculation. You can expect 10 to 30 ohms depending on the programmed drive strength. The series termination resistor should be reduced by this amount.

 

[big_fudge98]

I believe the impedance was set using the track widths.

 

[FvM]

I presumed that the termination matches the trace impedance. Either if you designed a specific trace impedance or use default trace widths, you'll end up with a a single ended trace impedance between 40 and 80 ohms.