UCC28951 Questions

[MrHerb]

Hi, I working on 48VV output, 60-200V input design based on UCC28951. Target output current is about 90A. My first attempt at this type of PSU design so excuse my lack of knowledge.
Following on from this thread: UCC28951 PSFB Controller - Sense Signal Filtering question

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Easy peasy[/USER]]
At 42V 5.5kW ( 135A ) you'll need some pretty impressive film/foil caps across the pir fet H bridge to soak up turn off current - else you'll get volt spikes that'll kill the fets - poof ...

you'll also need some pretty impressive snubbers across Qe, Qf to handle light loads - else poof again ...

Can you give me an example of the type of film/foil cap might be required, something like ECQ-E2106JF 10uf/250V ?

I've also been struggling a bit with the ringing across the output synchronous rectifier fets Qe and Qf at light loads and found there is a lot of power dissipation in the resistor of the RC snubber and RCD clamp when I tried that. I think I need to use fets with lower capacitance, I currently have IPW60R041P6 which I think is a bad choice Coss 310pf, Co eff 1200pf.

Also

cupoftea[/USER]]Also, please be sure to use SiC FETs......otherwise the PSFB's reverse recovery trick can be played out on you.

Sic Fets for the synchronous rectifier fets or the primary fets or both? I looked at something like the NTHL025N065SC1, Coss is similar 278pf (maybe Coss eff is better, it's not quoted in the datasheet).

Thanks.

​

 

[Easy peasy]

1st of all if you are 60VDC in and 50VDC out, the Tx has a turn ratio of approx, 1: 0.8333

So, when you apply 200V in the Vout of the Tx will be 167 V + spikes, so you need at least 250V mosfets ( H bridge sec ) with their attendant higher R-ds-on to complete the converter.

Far better to boost the input to 220VDc say, and then have a fully ZVS LLC down converter to control Vout ( no sw losses, no spikes on output rectifiers )

if you need control to very low or zero Vout or Iout - then the PhSh FB is the better option

And finally - regardless of caps etc - layout of the pcb, and the leakage of the Tx, is the key thing for low sw losses - and sensible freq of operation.

Choosing caps, be they MLCC or film / foil - is a mater of knowing the rms current in the cap and the loss of the part - a purely data sheet exercise for the non-lazy.

 

[cupoftea]

sync fets very difficult for you...as you describe..the ringing with Coss.
This is why Easy Peasy's "Booster then LLC" is so good for you.
Sync fets are better if you can get really really low L(leak)..e.g when Ns/Np is very low etc etc.
...or LLC because rectifier ringing is zilch with LLC...just put in a current monitor and turn off when you go into DCM...ie light enough load.

 

[MrHerb]

sync fets very difficult for you...as you describe..the ringing with Coss.
This is why Easy Peasy's "Booster then LLC" is so good for you.
Sync fets are better if you can get really really low L(leak)..e.g when Ns/Np is very low etc etc.
...or LLC because rectifier ringing is zilch with LLC...just put in a current monitor and turn off when you go into DCM...ie light enough load.

Thanks, I will look closer into "Booster then LLC" option, but for now I already have existing design based on UCC28951 which I really need to try and get working, even if over limited voltage range or reduced current output. The design is based of a TI webench design (see attached), I have a prototype built and it is working so far at reduced current output (the synchronous fets not firing yet as less than 30% load DCM threshold) my schematic is attached. Main thing that is concerning me at the moment is ringing on the synchronous fets (even though they not firing yet so the rectification is just through the body diodes). I have tamed that to a certain extent with a RC snubber across them (4 X 1nf + 33R 5W) but there is a lot of power dissipated by snubber resistors. So my next step was going to be to look for fets with lower Coss. Do you guys think that is the correct approach to take?

 

[Easy peasy]

OK - you've got problems right from the get-go.

you need a bi-filar secondary for low leakage between the 2 sec wdgs - but just as importantly you need low leakage back to the pri side as well
your extant transformer does not provide this - hence lots of leakage L and ringing on the sec side - only solution right now is lots of snubbing ( across fets ) for this setup - and we can't even see if the layout is any good - which may be adding to your woes.

Where are the V-ds and Vg-s waveforms for this abomination on the sec side please ?

If you have 500V fets on the sec side and you add just enough snubbing to keep the spikes to < 450V say ( at max Vin, 200V, and full power ) - then the design " could " work - albeit with a bit more EMI than you may have been hoping for, as you have a CT ( centre tapped ) Tx sec.

- the higher volts make the snubbers burn even more heat - esp if you are doing a crazy sw freq - which we don't know (??) - 100kHz ?

LOTS of current and high leakage inductance - and possibly wiring inductance on the sec side - always spells trouble for newbies

We get transformers designed by a crowd called pwrtrnx ( in Chch NZ of all places ), they are always just spot on - they demand all the power ckt information to arrive at a sweet design with detailed build sheets.

p.s. - any apparent double switching on the pri side you may see using this chip is due to too long dead times - sorting the dead times to match loading and Vin will be tricky for a newbie to set up - for leading and lagging legs are usually different.

p.p.s designing snubber values is not trivial - many people initially use too large a C and not the right R value - there is an easy way to calc if you know the Tx leakage on the sec side - power is proportional to C size and volts^2 - so it makes sense to get this just right.

[ worst case you could get a lot of 150V 5W zeners in a series-parallel combo across each fet, 3 in series gives 450V, and say 3 sets in // gives 9 zeners overall on each fet - in free air they can do about 300mW each = 2.7 watts - these will limit the peak V, then the snubbers can add a little more to reduce ringing - you're welcome ]

--- Updated Aug 13, 2024 ---

added some text above - may pay to re-read

 

[MrHerb]

OK - you've got problems right from the get-go.

you need a bi-filar secondary for low leakage between the 2 sec wdgs - but just as importantly you need low leakage back to the pri side as well
your extant transformer does not provide this - hence lots of leakage L and ringing on the sec side - only solution right now is lots of snubbing ( across fets ) for this setup - and we can't even see if the layout is any good - which may be adding to your woes.

Where are the V-ds and Vg-s waveforms for this abomination on the sec side please ?

If you have 500V fets on the sec side and you add just enough snubbing to keep the spikes to < 450V say ( at max Vin, 200V, and full power ) - then the design " could " work - albeit with a bit more EMI than you may have been hoping for, as you have a CT ( centre tapped ) Tx sec.

- the higher volts make the snubbers burn even more heat - esp if you are doing a crazy sw freq - which we don't know (??) - 100kHz ?

LOts of current and high leakage inductance - and possibly wiring inductance on the sec side - always spells trouble for newbies

We get transformers designed by a crowd called pwrtrnx, they are always just spot on - they demand all the power ckt information to arrive at a sweet design with detailed build sheets.

[ worst case you could get a lot of 150V 5W zeners in a series-parallel combo across each fet, 3 in series gives 450V, and say 3 sets in // gives 9 zeners overall on each fet - in free air they can do about 300mW each = 2.7 watts - these will limit the peak V, then the snubbers can add a little more to reduce ringing - you're welcome ]

Hi Easy Peasy, thanks so much for your feedback.

Above is Vds on secondary mosfets with no snubbers.

Above is Vds on secondary mosfet with RC snubbers added (4 X 1nf + 33R 5W), that's about best I could get it with lots of trial and error.
Yes switching frequency is 100Khz

This is at low loads 1A @ 48V out.
This is without the syncronous fets being driven (body diodes doing the rectification) below the DCM threshold setting of the UCC28951. So I don't have Vgs waveforms because the gates are always low.

PCB is four layer. Not sure how to post the layout in a readable form (done in AD10).

Sorry, yes, probably an abomination, I'm a newby at this.

 

[Easy peasy]

the quite noticeable difference between the blue ( looks good-ish ) and the yellow - is that the yellow is on the outside of the Tx with more leakage !

realistically - a new Tx is needed if you are ever going to get close-ish to full power.

The lack of symmetry we can easily see here will have an effect at higher power - already it looks like the yellow mosfet is zenering at its max Vds ??? - or clamping via the transformer back to the input bus.

have to go

 

[MrHerb]

the quite noticeable difference between the blue ( looks good-ish ) and the yellow - is that the yellow is on the outside of the Tx with more leakage !

realistically - a new Tx is needed if you are ever going to get close-ish to full power.

The lack of symmetry we can easily see here will have an effect at higher power - already it looks like the yellow mosfet is zenering at its max Vds ??? - or clamping via the transformer back to the input bus.

have to go

Ok, so this EE55 puppy no good ?

The lack of symmetry may be differences in the snubbers because I made them from parts I had lying around. I'm getting some specific high power snubber resistors in and some lower Coss Fets so will take some more scope shots after I've done that.

 

[Easy peasy]

Not if its made according to the drawings - however it does appear to be not made according to the drawings - are there 2 versions ?

Actually an interleaved planar would likely be the best fit for this converter.

 

[Easy peasy]

out of curiosity - is the scope shot with the large ringing yellow, over 600v Vd-s ?

 

[MrHerb]

out of curiosity - is the scope shot with the large ringing yellow, over 600v Vd-s ?

Yes, without the snubber, the ringing looks to be over 600V Vds when zoomed in. So that may have damaged the IPW60R041P6 but I think body diode is still ok because it's still rectifying ok once the snubbers are in place. I only ran very briefly without the snubbers so I could measure the ring frequency to calculate snubbers according to this https://www.ti.com/document-viewer/lit/html/SSZTBC7

This is another scope shot of both secondary Vds fets with no snubbers on longer timescale:

There is only one version of the transformer, they made 2 (of the same) samples which should match that datasheet AFAIK.

 

[Easy peasy]

Even the lead out wires on the shown transformer add significantly to the leakage inductance, considering you want to switch 90 amps.

Consider 90A and 1uH leakage referred to sec side, this is a stored energy of 4 mJ, at 100kHz, this is 405 watts that has to go some where ( x 2 for 2 output " diodes " ).

at 10 amp this is 50uJ x 100KHz = 5 watts ( each " diode" ) per snubber.

You can now see how a converter topology that uses the leakage is a much better option than a hard switched approach ( e.g. LLC over PhShFB ) - unless you run at 20kHz, where the sw losses are 5x less.

For this app you could probably tolerate say 15W per output "diode" snubber losses at full power, assuming 90 amps and 70kHz the leakage would then need to be ( from 0.5 L. I^2 F = power ) = 50nH, so you can see a laissez-faire approach to Tx design will not work here.

EP

--- Updated Aug 14, 2024 ---

Oh - I looked at the supplied web bench ( or whatever ) design - around the Tx, here it is:

I note it says 52.496 nH leakage - not too far from my quick calc ( I had 52.91nH ) - something of a pity this wasn't specified to the Tx maker from the get go ( not that any Tx maker I know could guarantee this figure from paper design - more like trial and error - the exception being the pwrtrnx crowd )

at ~ 10nH / inch wiring inductance ( standard industry guesstimate ) you want to keep the wiring loops from the fets to the transformer ( both sides ) and pri side decoupling ( area ) as small / short as possible so as not to introduce extra leakage L into the design.

Oh - smaller Coss mosfets will be of no help here - it just means the turn off spike will rise faster and higher.

 

[MrHerb]

Even the lead out wires on the shown transformer add significantly to the leakage inductance, considering you want to switch 90 amps.

Consider 90A and 1uH leakage referred to sec side, this is a stored energy of 4 mJ, at 100kHz, this is 405 watts that has to go some where ( x 2 for 2 output " diodes " ).

at 10 amp this is 50uJ x 100KHz = 5 watts ( each " diode" ) per snubber.

You can now see how a converter topology that uses the leakage is a much better option than a hard switched approach ( e.g. LLC over PhShFB ) - unless you run at 20kHz, where the sw losses are 5x less.

For this app you could probably tolerate say 15W per output "diode" snubber losses at full power, assuming 90 amps and 70kHz the leakage would then need to be ( from 0.5 L. I^2 F = power ) = 50nH, so you can see a laissez-faire approach to Tx design will not work here.

EP

--- Updated Aug 14, 2024 ---

Oh - I looked at the supplied web bench ( or whatever ) design - around the Tx, here it is:
View attachment 193045
I note is says 52.496 nH leakage - not too far from my quick calc ( I had 52.91nH ) - something of a pity this wasn't specified to the Tx maker from the get go.

That information was supplied to the transformer manufacturer. That webench report and all the transformer specifications were supplied to them so as a newby I just trusted they would have built to spec. Primary leakage inductance was measured (by the transformer manufacturer) as 0.25uH (250nH), even primary inductance is much higher 125uH (not 34uH).
Do you think it's worth me persevering with this transformer (I have invested in PCBs and assembly of all the associated parts) just to see how much power I can reasonably get out of it? Or is it a lost cause and I should shift to alternate topology.

 

[Easy peasy]

OK - there does seem to be some slight good news on the transformer front - since the turns ratio appears to be 0.75 pri : 1 sec ( from data sheet )

this can only be achieved with 3 : 4 turns <- this is the min turns that can give this turns ratio, the next is 6 : 8 and so on . . .

[ and I can almost count 4+4 turns on the sec from the pictures ]

So for 3 turns on the pri, and 2 x E55/28/21 cores of active area 722 mm^2 and say 55V volts driving, the delta B in the cores is: +/- 63mT @ 100kHz

Depending on how crappy the core material is ( and it ain't 3C98, that's for sure ) if you drop the sw freq to 50kHz the flux swing will double to +/- 0.126Bpk

which may well be just manageable for the core - likely 120mW / cm^3 when it gets up to temp ( ~ 80 deg c ? ) or possibly better - see below.

This halves the sw losses straight away - so down to 200W per diode snubber in the snubbers - at full power.

[ N.B. output current will be DCM for longer in L1, and twice as ripply in CCM - so check the temp rise of the dual L, L1 - p.s. inductors in series like this is a bad idea - as the mid point can ring like crazy and easily over volt the wdgs - so check this and perhaps add snubbers across each L - or a bigger single part - indeed a current doubler secondary with two chokes would have been a sitter here as only 45A in each choke and only 45A in Tx sec ].

but I digress slightly, you have D2, D3 as diodes to a sort of clamp ckt, now what you do is add a controlled buck as the load on C5 ( make C5 bigger, and the diodes while you're at it ) - a 400W buck converter if you haven't been following the discussion - and control its pwm in step with the pwm on the pri side - or using a Vmax control on C5 - any way it runs all the time but harder for higher load - this then gets your snubber energy to the output - and increases the efficiency of the whole ox cart quite a bit as well.

A good idea to leave the 9 x zeners on each of the two sec side mosfets as prev described - better safe than sorry from over volt spikes.

Since C5 is soaking up the energy - the buck can be further away from the action - which should help with overall layout.

A dummy load on the output, say 100mA at 48VDC, say 470 ohms, rated to easily handle 5W ( i.e. properly heatsunk ) - will help keep the buck output to 48VDC max at lighter loads.

Again - you're welcome.

--- Updated Aug 14, 2024 ---

--- Updated Aug 14, 2024 ---

--- Updated Aug 14, 2024 ---

TP4A - not TP44 as typed in Tx data sheet

--- Updated Aug 14, 2024 ---

--- Updated Aug 14, 2024 ---

That information was supplied to the transformer manufacturer. That webench report and all the transformer specifications were supplied to them so as a newby I just trusted they would have built to spec. Primary leakage inductance was measured (by the transformer manufacturer) as 0.25uH (250nH), even primary inductance is much higher 125uH (not 34uH).
Do you think it's worth me persevering with this transformer (I have invested in PCBs and assembly of all the associated parts) just to see how much power I can reasonably get out of it? Or is it a lost cause and I should shift to alternate topology.

It is largely a lost cause - unless you can get the tandem buck going - as suggested above. Just looking at it I suspect the figure of 250nH for leakage is a lil optimistic ( in fact if you measure Lpri with all sec's shorted, I would be surprised if the L leak measured < 1uH ) - why did they not gap/glue the cores to get 35uH pri L ? - that would have been easy enough.

You are certainly on a learning curve here.

 

[cupoftea]

this can only be achieved with 3 : 4 turns <- this is the min turns that can give this turns ratio, the next is 6 : 8 and so on . . .

Yes, and these are low numbers of turns...so you will have to wind to make sure every bit of every turn closely hugs the core bobbin...otherwise you will not get the full turns, you will get eg 3.7 turns, etc etc......ill send a diagram of a single turn done with close winding, and with "slack winding". Got to dash now though.

 

[Easy peasy]

Yes, and these are low numbers of turns...so you will have to wind to make sure every bit of every turn closely hugs the core bobbin...otherwise you will not get the full turns, you will get eg 3.7 turns, etc etc......ill send a diagram of a single turn done with close winding, and with "slack winding". Got to dash now though.

it don't work that way . . .

on a transformer - even with wonky windings the load closes the turn.

 

[cupoftea]

yes in terms of the primary alone...but the secondary will not "see" the full coupling of 3 full turns say, if the last turn is not hugging the bobbin like the first two will do. It will be slightly less than 3, and may still suffice of course.

 

[Easy peasy]

Coupling is purely related to the proximity of pri and sec to each other - not the core or the bobbin per se

 

[cupoftea]

Thanks thats true., and when one (sec) hugs the bobbin, and the other (pri) doesnt, (eg say the last turn, the way it comes off) then thats when you dont get the full 3 turns (or whatever) of coupling.
If we want exactly ns/np = 3/4 say, then we can use the planar transformer with those softwares that calc exactly the proper turns ratio for the geometry of the core and windings.....eg, "2.9/3.6" or whatever the initially wanted "3/4" comes out as

 

[Easy peasy]

you might be confusing leakage inductance ( low coupling ) with other things you may have observed - On open ckt the Vout matches the turns ratio - as soon as you start to pull some current the L -leak starts to block AC volts and you get less volts out - this is not due to partial turns though.