Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

4 Layer PCB stack-up clarification

newbie_hs

Full Member level 2
Full Member level 2
Joined
Mar 4, 2023
Messages
129
Helped
1
Reputation
2
Reaction score
1
Trophy points
18
Activity points
1,025
Dear Team,

I have a 4 layer PCB with below stack-up

1]Signal
2]GND
3]Power+GND
4]Signal

This board mainly contains a microcontroller, LTE module, emmc ,Switching regulator,USB2.0,CAN,RF Antenna(WiFi and GNSS) and RS485.

My question is ,

  1. is it better to make 3rd layer as complete power layer instead of power+GND.
  2. Because when it is made as power+GND the signals in the bottom layer will be referenced to both power and GND plane.(Some portion of the same signal will be referenced to power and some other portion will be referenced to GND)
  3. Will this referencing (GND+Power) cause any EMI EMC issues
 
Hi,

In my eyes the most important is that your layer#2 is really solid GND without other signals cutting the plnae into pieces.
The next important is that all your high frequency traces (for exact characteristic impedance) should be next to this GND_plane. (like layer#2 = GND, layer#1 = HF signals)

Whether layer#3 now contains extra GND often does not really matter, because this GND is split in pieces and thus rather high ohmic compared to the GND of layer#2.

If you are running low on layers, then better use layer#3 additionally for signal routing. The power supply traces just need to be wide enough not to drop too much (DC) voltage.
Here you need to focus on DC resistance only. The high frequency part for the power supplies are done via distributed decoupling capacitors with low impedance connections to the GND plane.

This is totally different when you need HF signals on both TOP and BOTTOM. But I guess this is not the case here.

And I think that part placement is more important than a second layer containing GND.

****
I personally often use just one layer for GND. But this one is solid without any other signals.

Klaus
 
Hi,

In my eyes the most important is that your layer#2 is really solid GND without other signals cutting the plnae into pieces.
The next important is that all your high frequency traces (for exact characteristic impedance) should be next to this GND_plane. (like layer#2 = GND, layer#1 = HF signals)

Whether layer#3 now contains extra GND often does not really matter, because this GND is split in pieces and thus rather high ohmic compared to the GND of layer#2.

If you are running low on layers, then better use layer#3 additionally for signal routing. The power supply traces just need to be wide enough not to drop too much (DC) voltage.
Here you need to focus on DC resistance only. The high frequency part for the power supplies are done via distributed decoupling capacitors with low impedance connections to the GND plane.

This is totally different when you need HF signals on both TOP and BOTTOM. But I guess this is not the case here.

And I think that part placement is more important than a second layer containing GND.

****
I personally often use just one layer for GND. But this one is solid without any other signals.

Klaus
Please see my GND plane below.
The blue color one one is signal GND others are earth gnd,USIM_GND
1705637532514.png


Below is the power plane(Layer 3)
1705637563324.png
 
i don’t really see the point of those little islands at the top of your ground layer. if you REALLY need them, then maybe put them on layer 3. Youve also got some chopped up little islands on layer 3. Unless you’ve got serious cost constraints, maybe you need a 6 layer board. i hate seeing signal traces on plane layers.
 
Hi,

I see you are more experienced in doing PCB layout as your initial question lets expect.
Well done so far. I guess layer#2 and layer #3 make perfectly sense.
I guess there is high voltage (mains) involved.
I don´t know your application´s details, but seeing the vias in your GND_islands tells me you designed it properly. And I don´t expect no GND problems caused by the islands.

****

I urgently recommend to use a rock solid GND plane (without foreign signals, without islands, without cuts...) especially for the members here that are not that experienced in PCB routing. It is a simple way to ensure stable GND ... and in my eyes is the easiest way to design reliably working, low noise circuits. Routing a 4 layer PCB with a solid GND plane is far more easier than doing a 2 layer PCB without GND plane (and thus the need to look for paths for the GND traces).
It´s like a rock solid foundation for a big house.

The more experienced you are the more you understand the current flow in a GND plane, you knw where you need to care about signal impedance, you know where it´s a benefit to add islands or add splits tot the GND plane (as you did).

Klaus
 
Looks OK.
What I will say is avoid GND pours on adjacent layers under isolated GND's, you will get capacitive coupling and thus higher frequency noise will couple between the GND's...
 

LaTeX Commands Quick-Menu:

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top