routing DC bias threw grond plane

[yefj]

Hello , I have a two layer PCB. One layer is GND and the other is the signal layer.
My components needs DC supply ,can i do VIA go to the layer intended for ground carve out free space do traces intended DC bias and then go up to the Component on the trace level.
Is it possible?
Thanks.

 

[stenzer]

Hi,

this is common practice. Nevertheless, you should keep possible return current "ways" in mind and provide a low impedance path while interrupting the GND plane. Further, it highliy depends on your system frequencies.

BR

 

[yefj]

Hello, I know what impedance is,could you please give me an example so i could visualise this?
Thanks.
"Nevertheless, you should keep possible return current "ways" in mind and provide a low impedance path while interrupting the GND plane. "

 

[stenzer]

Have a look here

Slots in GND Planes - In Compliance Magazine

Many of the EMI/EMC problems in electronic products can be avoided or solved with ground (GND) planes. But, be sure your GND plane is a true GND plane.

incompliancemag.com

The link shows actual slots, but the same holds if the GND plane is interrupted by an other trace.

Further, at quite low frequencies the path with the lowest impedance is the same as the one with the shortest distance. At higher frequencies the low-impedance return path is usually in the vicinity of the "signal-input" trace.

BR

 

[yefj]

So basicly our gound is becoming a slot antenna that is doing coupling to the signal traces,correct?
I have an altium desihner project.
what are possoble laws to minimise the slots effect on the trace?
Thanks.

 

[stenzer]

There are tons of good application notes and websites out there providing a good overview as well as deep insight knowledge what has to be considered when layouting a PCB. Here, the application is of course of interest. Are you designing a board for

• RF applications
• Digital high speed
• Sensitive metrological measurement tasks
• Switching power converter

Here are some links

http://www.elmac.co.uk/EMC_SelfStudy-std/Index.htm?context=380
https://www.protoexpress.com/blog/current-return-path-signal-integrity/
https://learnemc.com/pcb-layout

Further, keep in mind that a trace can be considered to be "electrically short", if the trace length is shorter than a tenth of the wavelength of interest.

BR

 

[KlausST]

Hi,

.. and whether a trace "can be routed through a GND plane" can be seen when you take some random PCBs (or photos from internet) and check how they are designed.

An internet search for pictures "pcb traces through gnd plane" should be an easy task for every electronics designer.

And since it´s a DC path, one does not need to care for "impedance" or "HF" and it usually causes no EMI and EMC problems.

The only "signalling problem" can be when there are HF signals on the opposite side at the position fo the DC trace.
But the OP did not ask about this and gives no information that there are HF signals at all.

Klaus