unix_amr
Junior Member level 1
Hi
I need to design a voltage pulse generator to connect an nMOS gate terminal (65nm CMOS technology) by Spectre. Pulse amplitude is Vdd (1.2v), pulse width is 500ps (with acceptable tolerance), and both rise-time and fall-time are smaller than 100ps.
I would appreciate it if anyone could help me.
I need to design a voltage pulse generator to connect an nMOS gate terminal (65nm CMOS technology) by Spectre. Pulse amplitude is Vdd (1.2v), pulse width is 500ps (with acceptable tolerance), and both rise-time and fall-time are smaller than 100ps.
I would appreciate it if anyone could help me.