MOSFET SOA

[parth22]

HI all,
I have a MOSFET circuit. I would like to verify that I am in the SOA region of MOSFET.
How can I do this?
this is the datasheet of the MOSFET model which I have used in the simulation model.

https://www.vishay.com/docs/73113/73113.pdf

I have idea like I have to check Rds on, power and etc...
or can anyone help am i violating the SOA in the below circuit?
Thanks.

 

[KlausST]

Hi,

Worst case is approximately at 2.4A @ 24V for 2 ms.
Close to the limit, but should be O.K.
Mind to start with room temperature.

Klaus

 

[parth22]

Hi,

Worst case is approximately at 2.4A @ 24V for 2 ms.
Close to the limit, but should be O.K.
Mind to start with room temperature.

Klaus

question is how you checked this worst case?
and one more thing,,,,it's a logarithmic graph .right? it means at x axis these are not actual VDS voltage....
or am I wrong?

Also in the SOA graph,,,right side there is timing axis also,,,,what does it refer?...

 

[KlausST]

Hi,

Worst case is with highest power.
Draw a graph with P = V_ds x I_d
It should be about 60W max.

Logarithmic or not: X-axis is V_ds.

SOA graph: right side is not the time. The time values belong to the according lines (over the complete chart)
The diagonal "1ms" line shows about 100W of power dissipation.

Klaus

 

[parth22]

Hi,

Worst case is with highest power.
Draw a graph with P = V_ds x I_d
It should be about 60W max.

Logarithmic or not: X-axis is V_ds.

SOA graph: right side is not the time. The time values belong to the according lines (over the complete chart)
The diagonal "1ms" line shows about 100W of power dissipation.

Klaus

It means MOSFET can handle maximum 100W power for 1ms. where can I see in my simulation that MOSFET is not drawing more than 100W power in 1ms...?
Well I think I got it...in the below image I can see maximum power is 72W at 9ms. SO if i will draw a line in SOA graph just above to 10ms,,,that will be 9 ms line...and there MOSFET can handle maximum around 60 W power....
SO I am violating the SOA...

Is this right explanation?

 

[KlausST]

No,

9ms is the absolute time beginning from start of simulation.
Imagine if you started the simulation yesterday .. then the power pulse was at 86,000,000 ms ...

--> What counts is the width of the pulse ... maybe 1ms ... 1.5ms

When the datasheet says 100W for 1ms, then the energy is 100mWs.
If interested you may integrate your dissipated power ...

Klaus

 

[stenzer]

where can I see in my simulation that MOSFET is not drawing more than 100W power in 1ms...?

In LTSpice you have the possebility to to perform different measurements, have a closer look at [1]. You also can zoom into the region of interest in the graph window, press and hold CTRL and make a LMB click on the trace name of interest, in your case V(S,D)*Id(M1). This sould deliver the average power and energy, which is determined by performing an integration of your zoom area (interval start and stop should be stated).

[1] http://ltwiki.org/LTspiceHelp/LTspiceHelp/_MEASURE_Evaluate_User_Defined_Electrical_Quantities.htm

BR

 

[parth22]

No,

9ms is the absolute time beginning from start of simulation.
Imagine if you started the simulation yesterday .. then the power pulse was at 86,000,000 ms ...

--> What counts is the width of the pulse ... maybe 1ms ... 1.5ms

When the datasheet says 100W for 1ms, then the energy is 100mWs.
If interested you may integrate your dissipated power ...

Klaus

"When the datasheet says 100W for 1ms, then the energy is 100mWs."
can I see this thing in my simulation,,,,
in the below image you will see the energy also...so ?
my only doubt is that how to verify the power SOA diagram with my simulation ?

--- Updated Apr 15, 2022 ---

In LTSpice you have the possebility to to perform different measurements, have a closer look at [1]. You also can zoom into the region of interest in the graph window, press and hold CTRL and make a LMB click on the trace name of interest, in your case V(S,D)*Id(M1). This sould deliver the average power and energy, which is determined by performing an integration of your zoom area (interval start and stop should be stated).

[1] http://ltwiki.org/LTspiceHelp/LTspiceHelp/_MEASURE_Evaluate_User_Defined_Electrical_Quantities.htm

BR

yes,,,I plotted the energy plot but issue is I wanna verify this with SOA graph.

 

[FvM]

V*I*time is not integral(V*I). You can use integral function in waveform arithmetic. The total dissipated energy can be easily calculated, it's equal to the stored capacitor energy 0.5*C*V^2 = 132 mJ.

 

[stenzer]

Hi,

"When the datasheet says 100W for 1ms, then the energy is 100mWs."
can I see this thing in my simulation

have a look on the definition of Joule [2].

You should zoom in, and perform the integration as explained in my previous reply starting from ~7 ms to ~10.25 ms for V(S,D)*Id(M1). You can also make a RMB click on the x-axis to set the start and stop time. This gives you a result in Joules ( J = W • s). The SOA graph also provides the voltage and current (-> [P] = W) as well as the time.

For your shown V(S,D)*Id(M1) plot i would estimate an energy of about 125 mW (75 W / 2 • 3.5 ms).
Having a look in the SOA graph than for

1. VDS of ~40 V an ID of about 30 mA results for to stay within the SOA, lets say for 10 seconds this leads to an energy of 12 J.
2. ID is ~ 5 A, a maximum VDS of ~0.7 V results to stay within the SOA for 10 seconds, which results in an energy of 35 J.

So you can see, for both of your worst case scenarios you are way below this two determined values. It is somehow tricky to choose a proper current and voltage level for the transient event. But what you can see from the SOA graph, and also from the two determined energy values, a higher energy can be handled for shorter time periods (keep the ongoing heating of the MOSFET in mind).

BR



[2] https://en.wikipedia.org/wiki/Joule

 

[Easy peasy]

The ave power is say 32W for 2mS say - looking at the SOA graphs you can have 40W for 10mS ( 20V @ 2A )

if the device starts from 25 deg C, heatsinking would help ( as always )

to be fair you are at the limit of what the device can handle - several pulses in quick succession would get near to melting the die ( with no heatsink ).

 

[stenzer]

Hi,

I just checked which kind of Spice model is provided by VISHAY. For example ST provides models which enable the observation of the MOSFET's junction temperature [3]. Such kind of Spice model is not provided by VISHAY, but they provide a thermal RC model [4] and also explain how to use it [5]. You should be able to implement this thermal model in LTspice without influencing your circuitry, by means of a current controlled current source [6]. Check if the maximum junctuion temperature is below the maximum temperture of 150°C, stated in the datasheet.


[3] https://www.st.com/resource/en/user...rial-for-power-mosfets-stmicroelectronics.pdf
[4] https://www.vishay.com/docs/69226/si7465dp.pdf
[5] https://www.vishay.com/docs/73554/73554.pdf
[6] https://forum.digikey.com/t/ltspice-tips-current-dependent-current-source/13331

BR

 

[parth22]

Hi,



have a look on the definition of Joule [2].

You should zoom in, and perform the integration as explained in my previous reply starting from ~7 ms to ~10.25 ms for V(S,D)*Id(M1). You can also make a RMB click on the x-axis to set the start and stop time. This gives you a result in Joules ( J = W • s). The SOA graph also provides the voltage and current (-> [P] = W) as well as the time.

For your shown V(S,D)*Id(M1) plot i would estimate an energy of about 125 mW (75 W / 2 • 3.5 ms).
Having a look in the SOA graph than for

1. VDS of ~40 V an ID of about 30 mA results for to stay within the SOA, lets say for 10 seconds this leads to an energy of 12 J.
2. ID is ~ 5 A, a maximum VDS of ~0.7 V results to stay within the SOA for 10 seconds, which results in an energy of 35 J.

So you can see, for both of your worst case scenarios you are way below this two determined values. It is somehow tricky to choose a proper current and voltage level for the transient event. But what you can see from the SOA graph, and also from the two determined energy values, a higher energy can be handled for shorter time periods (keep the ongoing heating of the MOSFET in mind).

BR



[2] https://en.wikipedia.org/wiki/Joule

Hi thanks for the detailed explanation.
I got about energy thing and it's simulation in spice.

BTW some corrections and questions:
you said that....
VDS of ~40 V an ID of about 30 mA results for to stay within the SOA, lets say for 10 seconds this leads to an energy of 12 J.
I have rechecked it in SOA graph that for 40V and and maximum power line for 10S finish at around 80mA or 90mA....this leads to an energy around 32J.
Am i right???

one question:
Estimated energy for 3.5ms , we can see it is ~130mJ.......
so 3.5ms is the pulse width where maximum energy (~130mJ)is dissipating by MOSFET.
I have taken some values form SOA graph,,these are as following: (not excact but almost)
for 1ms: 112mJ to 120mJ
for 10ms: 400mJ to 540mJ
for 100ms: 1.2J to 1.35J
for 10s: 32 to 35J

so first of all these 1ms, 10ms and 10s are the pulse width ....right?
and in my case the pulse width is 3.5mS....right?

so now if we consider pulse width 3.5ms,,,,then am i still within the SOA region....or not?

Hoping a good explanation...as like earlier,,,,
Thanks in advance.

 

[KlausST]

Hi,

so first of all these 1ms, 10ms and 10s are the pulse width ....right?

That´s what the diagram says: "Single pulse".
And a pulse is defined with magnitude and timing.
In the case of SOA diagram one estimates a square pulse. So your pulse waveform is a bit relaxed when looking at the peak vs average power.

and in my case the pulse width is 3.5mS....right?

The waveforms differ, thus there is no exact definiton of pulse width for non square waveforms.
I recommend to keep some headroom.

so now if we consider pulse width 3.5ms,,,,then am i still within the SOA region....or not?

I stay with my opinion of post#2.

Klaus

 

[parth22]

Hi,


That´s what the diagram says: "Single pulse".
And a pulse is defined with magnitude and timing.
In the case of SOA diagram one estimates a square pulse. So your pulse waveform is a bit relaxed when looking at the peak vs average power.


The waveforms differ, thus there is no exact definiton of pulse width for non square waveforms.
I recommend to keep some headroom.


I stay with my opinion of post#2.

Klaus

okah i got it....
when we are in the transient region,,,one can not estimate the fixed pulse width.....while in the SOA we will always have fixed pulse width .

i got your point about 2.4A @24V for 2ms....I am almost close (in the below figure)...
BTW I have one question to you.....from my very 1st post,,,how do you get these data points (2.4A @24V) and for 2ms..
I want to know the main root so I can work with other circuit also...
Thanks.

--- Updated Apr 16, 2022 ---

Hi,

I just checked which kind of Spice model is provided by VISHAY. For example ST provides models which enable the observation of the MOSFET's junction temperature [3]. Such kind of Spice model is not provided by VISHAY, but they provide a thermal RC model [4] and also explain how to use it [5]. You should be able to implement this thermal model in LTspice without influencing your circuitry, by means of a current controlled current source [6]. Check if the maximum junctuion temperature is below the maximum temperture of 150°C, stated in the datasheet.


[3] https://www.st.com/resource/en/user...rial-for-power-mosfets-stmicroelectronics.pdf
[4] https://www.vishay.com/docs/69226/si7465dp.pdf
[5] https://www.vishay.com/docs/73554/73554.pdf
[6] https://forum.digikey.com/t/ltspice-tips-current-dependent-current-source/13331

BR

Thanks .
well I have introduced thermal model also...
I am within the range...by considering both cases..junction to ambient and junction to case..
can you just confirm....is this the right way to make thermal model....or am i doing something wrong?

 

[KlausST]

Hi

.from my very 1st post,,,how do you get these data points (2.4A @24V) and for 2ms..

with ohmic load (the MOSFET during switching) ... the peak power dissipation is at VDS_max/2 and at about I_D/2.
In the given case this is an approximation.

going from left to right is statrs with zero current. --> no power dissipation
Then you have power dissipation because of current an voltage
after that the voltage drop becomes zero --> thus no power dissipation.
Now it´s clear somewhere inbetween OPEN and CLOSE there is the peak of power dissipation.

Both voltage and current follow a some kind of linear behaviour. The higher the current the lower the voltage drop.
Imagine a vertical line when V_DS crosses 42V/2 = 21V --> you see that I_D is higher than 4.5A/2
Imagine a vertical line when I_D crosses 4.5A/2 --> you see that V_DS is higher than 21V.

Now imagine a third vertical line exactly between the lines before.
--> it should give about the point of max. power, Id and V_ds.

Time:
Decent power dissipation starts at 8ms and ends at 10ms...tus 2ms.

Klaus

 

[parth22]

o

Hi


with ohmic load (the MOSFET during switching) ... the peak power dissipation is at VDS_max/2 and at about I_D/2.
In the given case this is an approximation.

going from left to right is statrs with zero current. --> no power dissipation
Then you have power dissipation because of current an voltage
after that the voltage drop becomes zero --> thus no power dissipation.
Now it´s clear somewhere inbetween OPEN and CLOSE there is the peak of power dissipation.

Both voltage and current follow a some kind of linear behaviour. The higher the current the lower the voltage drop.
Imagine a vertical line when V_DS crosses 42V/2 = 21V --> you see that I_D is higher than 4.5A/2
Imagine a vertical line when I_D crosses 4.5A/2 --> you see that V_DS is higher than 21V.

Now imagine a third vertical line exactly between the lines before.
--> it should give about the point of max. power, Id and V_ds.

Time:
Decent power dissipation starts at 8ms and ends at 10ms...tus 2ms.

Klaus

ohhhhhhh okahhhhh.
Thanks...I got your all points.

 

[FvM]

well I have introduced thermal model also...
I am within the range...by considering both cases..junction to ambient and junction to case..
can you just confirm....is this the right way to make thermal model....or am i doing something wrong?

The thermal model is applied correctly. The results suggest however that the model parameters in the Vishay application note are not equally accurate for the millisecond time range. It's physically impossible to get a higher junction temperature with case hold at 25 °C than without heatsink in 25° C ambient. So there's still a doubt if the 80°C or 130°C peak temperature curve is better corresponding to actual junction temperature. Both are within allowed junction temperature range.

As an additional remark, determing SOA by calculating junction temperature with thermal model is only valid in the "constant power line" range of the output charactersistic. For the discussed transistor, you see a range above VDS of 35 V with higher slope where the applicable power is limited by hot spot effects. The thermal model assumes equal power dissipation over the chip and would underestimate the SOA limit in this range. Fortunately, in this circuit Vds is below 35 V when the junction temperature rises.

See an explanation in this Infineon AN https://www.infineon.com/dgdl/Infin...h.pdf?fileId=db3a30433b47825b013b6b8c6a3424c4

 

[parth22]

The thermal model is applied correctly. The results suggest however that the model parameters in the Vishay application note are not equally accurate for the millisecond time range. It's physically impossible to get a higher junction temperature with case hold at 25 °C than without heatsink in 25° C ambient. So there's still a doubt if the 80°C or 130°C peak temperature curve is better corresponding to actual junction temperature. Both are within allowed junction temperature range.

As an additional remark, determing SOA by calculating junction temperature with thermal model is only valid in the "constant power line" range of the output charactersistic. For the discussed transistor, you see a range above VDS of 35 V with higher slope where the applicable power is limited by hot spot effects. The thermal model assumes equal power dissipation over the chip and would underestimate the SOA limit in this range. Fortunately, in this circuit Vds is below 35 V when the junction temperature rises.

See an explanation in this Infineon AN https://www.infineon.com/dgdl/Infin...h.pdf?fileId=db3a30433b47825b013b6b8c6a3424c4

Ohhh okah...
Thanks.
BTW what to do if there is no RC model for another transistor.......I saw some more transistor data sheets where RC model is not given....
in this case any suggestion?

 

[koreansud88]

Please focus on the device itself, rather than the datasheet SOA. The SOA graph is merely a guideline which does not and could not represents the device in your specific application.

1. Just clarify, the SOA graph curve is not measured by manufacturers but for manually plot according to diverse failure mechanism limit associate to the silicon, package, assembly, operation conditions.

2. Thermal impedance model is a RC ladder circuit to evaluate the operation temperature, which could be accurate if appropriated used. It is merely a modeling tool and you need to understand the device in operation.

Were you a high volume customer of the manufacturer, the manufacture could assign a device physicist to help you out in your specific condition, who might tweak its device to meet your need perfectly (design in for you). If not, please be patient with the application engineer or marketing guy to ask their device physicist to leave a few word as reply, which you might find useful or no sense making.