Strange thing , first time get this type or error : ERROR:ConstraintSystem:59

[abimann]

Top level port :
ss_n : BUFFER STD_LOGIC_VECTOR(0 DOWNTO 0);

constraint file ucf :
NET "ss_n" LOC = "AC24" ;# | S=true; #keep={yes|no|true|false}| keep=true

Error :
ERROR:ConstraintSystem:59 - Constraint <NET "ss_n" LOC = "AC24" ;>
[dfg.ucf(18)]: NET "ss_n" not found. Please verify that:
1. The specified design element actually exists in the original design.
2. The specified object is spelled correctly in the constraint source file.


I tried change type of port from "BUFFER" to normal "OUT" like

ss_n    : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);

and use buffer :

--OBUF_CamOE : OBUF
--					generic map (   DRIVE => 12,   IOSTANDARD => "DEFAULT",    SLEW => "FAST")
--					port map (   O => ss_n(0),     I => ss_n_i(0)   );

but not helped me , then i found solved link and use KEEP and S attributes also not help why ? http://www.xilinx.com/support/answers/34258.html

also not helped me, very strange problem

 

[ads-ee]

The net name is ss_n(0), ss_n is a vector with a 1-bit width and you can't assign a vector to a loc constraint.

 

[abimann]

Thank you much ads-ee ! " ss_n<0>" worked for me.