LLC converter with variable output voltage 0..10VDC @1.7kW

[rxpu]

I am trying to build an LLC converter with wide variable output voltage. I also read the following thread (see bottom) and made some enchancements regarding Lp/Lr ratio and duty cycle control of the variable frequency.


1-) First I designed a low Lp/Lr ratio.

So my magnetising inductance= 90uH, Leakage inductance= 115uH

This will give me a limited variable range between 10V and 6V for wide Qload.
Ex: Fr regultes between 110kHZ (near resonance) for 10V and a little bit far ex: 140kHZ for 6V , in dependance of Qload. (assuming that my Fr resonance freq for inductive region=100kHZ).


2-) In order to enlarge the output range down to 2V..10V. I am considering adding a duty cycle regulation between 6V..2V. So that I do not go much above 140kHZ, but hold the frequency constant and reduce the duty cycle to reach down to 2V for a wide range of Qload.

What do you think abaout it?

Will there be problems when I am a little bit far from resonance frequency and regulate the duty cycle to reduce the output voltage while holding the frequency at 140kHZ?

It is a half bridge topology. I may change it to full bridge and use the full bridge between 10V..5V and switch to half bridge for 5V..0V. But I want to implement it complety as half bridge topology.

Any ideas?










https://www.edaboard.com/showthread.php?306590-Designing-LLC-Converter-with-variable-output-voltage-and-current

 

[asdf44]

Basically it sounds to me like you're trying to get the LLC to do things an LLC isn't good at (span a wide operating range).

As is true with many things in life I'm sure you can do it with sufficient time and control complexity, but I'd suggest evaluating other topologies.

Phase shifted full bridge in particular has no problem operating over such a range (Admittedly I've designed PSFB and not LLC).

 

[FvM]

You mention "adding duty cycle regulation" with your imagined LLC design, but the idea isn't compatible with ZVS operation.

 

[rxpu]

You mention "adding duty cycle regulation" with your imagined LLC design, but the idea isn't compatible with ZVS operation.

Is it a better idea to use a complementary PWM (such as in buck topology) rather than narrowing the duty cycle.

What I mean is , I narrow the duty cycle of the upper leg ex: %30 and after inserting a small dead-time the lower leg will switch with %70 duty cycle to complete the period.

Can I insert a buck type control into the LLC converter after a certain frequency. (ex: after 140khz , so after a 40khz shift from the resonance frequency of 100kHZ?).

If the pwm is complementary will it achieve ZVS?

I may combine Phase-shift-converter and LLC and use the LLC from Fr to Fr+30kHZ and after that hold the frequency and reduce the the phase angle between the legs of the full bridge. As I said topology morphing is also possible from full bridge to half bridge to reduce output voltage to half. But these methods need a full bridge.

Is there any ideas for the half bridge topology for a wide variable output voltage range?

 

[Easy peasy]

Just go higher in freq ... why not 200kHz ..?

 

[asdf44]

Well my general advice is: If you're not doing something really specialized...don't do something really specialized.

Why are you trying to make the LLC do things an LLC isn't good at? I see LLC as one of the highest efficiency ZVS topologies but not my much. PSFB is a quasi resonant partial ZVS topology that's probably simpler to design but has full range of Vout from 0 to full scale using a single modulation scheme.

You're inevitably going to run into problems tuning one topology for both phase shifted and frequency modulation, not to mention handling the transition and implementing both.

There are other ways to improve efficiency such as investing in newer parts (SiC, GAN).

Also I assume you're doing digital control? That's the only way I see this being realistic.

 

[rxpu]

Just go higher in freq ... why not 200kHz ..?

The gain diagram shows that even @250-300kHZ (for middle-low load Qvalue). it is not possible to get lower output voltage.

- - - Updated - - -

Well my general advice is: If you're not doing something really specialized...don't do something really specialized.

Why are you trying to make the LLC do things an LLC isn't good at? I see LLC as one of the highest efficiency ZVS topologies but not my much. PSFB is a quasi resonant partial ZVS topology that's probably simpler to design but has full range of Vout from 0 to full scale using a single modulation scheme.

You're inevitably going to run into problems tuning one topology for both phase shifted and frequency modulation, not to mention handling the transition and implementing both.

There are other ways to improve efficiency such as investing in newer parts (SiC, GAN).

Also I assume you're doing digital control? That's the only way I see this being realistic.

Phase shift converter is simple and basic but have some drawbacks.

The primary side has partial ZVS (only for above %30-40), but more important the secondary rectifiers are hard switched. So I need heavy dissipative snubbers at the secondary side. As my output is 10V @170A , I need diodes or Mosftes up to 100V-150V breakdown voltage rating. I also need big inductors at the output. The switching frequency is limited to 100-150khz for acceptable efficiency.I also needs full bridge construction.

On the other side LLC has ZVS for all load range. But the most effective part for me is the secondary side. The secondary diodes or Mosfets are soft switch. there is no snubber need. Diodes and Mosfets Low lower voltage rating and smaller rdson is possible., Half bridge construction is possible.No need for full bridge maybe up to 1kW-1.7kW.
The switching frequency can go beyond 500khz to make the converter smaller.


But my final desicion why I force myself to build LLC is the soft switching behaviour of the secondary side.

 

[Easy peasy]

You need to change the inductance ratio - essentially a higher Q for a given load - so that 200kHz will give you the lower o/p - this is by far the easiest way to go ...

 

[rxpu]

You need to change the inductance ratio - essentially a higher Q for a given load - so that 200kHz will give you the lower o/p - this is by far the easiest way to go ...

Yes , I already extremely lowered the inductance ratio. I placed a very big air gap on all three legs simultaneously. (each 1.8mm).

This lowered the magnetising inductance down to 90uH. (for 25 turns on the primary, Ae=500mm2)

L-leakageprimary= 115uH.

So that I have a very low inductance ratio. But this has a down side. As the magnetising inductance goes down, the magnetising current goes up. Huge current fluctuates on the primary because of the low mag. inductance that does not participate in secondary.

Which way is smarter ?

1- Lowering Lm/Lleakage to a much lower value. (maybe ratio: 1-1.5). Accepting high magnetising current on the primary.

2- Moderate Lm/Lleakgae. (ratio:2-3). Extending the frequency range maybe from Fr to Fr+300khz. Accepting low efficiency because of switching loss.

3- Add duty cycle after Fr+40khz. Do not change the freq after Fr+40khz, but only change the duty cycle for further regulation. Accept loss of ZVS and related inefficiency.

Which way is smarter and is more energy efficient? 1 or 2 or 3? . Or should I use a combination of all to get acceptable variable wide output voltage on secondary.

Which points would you include in the optimisations and which ones would you avoid?

 

[Easy peasy]

Given that you are not happy with the high circulating currents - a better approach would be a full bridge phase shift with sufficient Lext ( to the pri side ) to give loss less switching over most of the load range e.g. 10% to 100%.

LLC is not suited to very wide range Vo, without another LC filter across the Tx sec.

- - - Updated - - -

As freq tends to infinity, the voltage divider from the pri side to the load becomes Lleak : Lmag if these are equal, the min out is 50% (scaled by Tx) of the pri bus.

This is the major limitation of the LLC ( really CLL ) - if you use a double LC, with the last C across the Tx pri you can get good turn down of the Vout with a moderate freq range - full ZVS, low emi - however you need a current doubler filter on the output ( or a full bridge rect and DC choke )...

 

[rxpu]

Given that you are not happy with the high circulating currents - a better approach would be a full bridge phase shift with sufficient Lext ( to the pri side ) to give loss less switching over most of the load range e.g. 10% to 100%.

I want to avoid full bridge because of BOM. Even if I add the inductor to the primary, the secondary rectifiers will be hard commutating. There is also very limited room for future enchancements for the reduction of W/lt (power supply size)

LLC is not suited to very wide range Vo, without another LC filter across the Tx sec.

As freq tends to infinity, the voltage divider from the pri side to the load becomes Lleak : Lmag if these are equal, the min out is 50% (scaled by Tx) of the pri bus.

This is the major limitation of the LLC ( really CLL ) - if you use a double LC, with the last C across the Tx pri you can get good turn down of the Vout with a moderate freq range - full ZVS, low emi - however you need a current doubler filter on the output ( or a full bridge rect and DC choke )...

Do you mean a paralel resonant structure?. It should have also drawbacks (again high circulating current).

Regarding Lleak:Lmag ratio, in order to achieve a very high Lleak and a very low Lmag I have the following arrangement:

Instead of 1 big transformer with Lleak=115uH Lm=90 uH (Gap:1.8mm Ae:500mm2). I have 4 series connected smaller transformers each having 5 primary windings. 4 total have 1:20 turns ratio. Each have Lleak=30uH and Lm=6 uH

At the end, I have a transformer group having Lleaktotal= 120uH Lmagtotal=24uH.

If I assume that the circulating magnetising current loss can be minimized by using more copper and better semiconductors such as GaN (the prices are decreasing), this could be a comprimise.

For very high Lleak and very low Lm, can the short circuit protection be a problem. In order to solve this issue , I look at the capacitor diode clamped LLC half bridge converter.

https://pdfs.semanticscholar.org/c247/0f03f68f3366892b743866e53727c10d1727.pdf

What do you think abaout it?

Very high Lleak=120uH , very low Lmag=24uH and capacitor-diode clamped half bridge .

 

[asdf44]

The gain diagram shows that even @250-300kHZ (for middle-low load Qvalue). it is not possible to get lower output voltage.

- - - Updated - - -



Phase shift converter is simple and basic but have some drawbacks.

The primary side has partial ZVS (only for above %30-40), but more important the secondary rectifiers are hard switched. So I need heavy dissipative snubbers at the secondary side. As my output is 10V @170A , I need diodes or Mosftes up to 100V-150V breakdown voltage rating. I also need big inductors at the output. The switching frequency is limited to 100-150khz for acceptable efficiency.I also needs full bridge construction.

On the other side LLC has ZVS for all load range. But the most effective part for me is the secondary side. The secondary diodes or Mosfets are soft switch. there is no snubber need. Diodes and Mosfets Low lower voltage rating and smaller rdson is possible., Half bridge construction is possible.No need for full bridge maybe up to 1kW-1.7kW.
The switching frequency can go beyond 500khz to make the converter smaller.


But my final desicion why I force myself to build LLC is the soft switching behaviour of the secondary side.

I'm not sure I agree with your analysis of the secondary. While its true the PSFB has worse ringing because of the secondary inductor position the secondary of the PSFB also soft switches. Anytime you see a diode in a power topology it's a clue there is soft switching because diodes can't hard switch themselves. So when the PSFB is running in its soft switching region all switches are soft switching, including the secondary rectifiers.

My own phase shifted full bridges have had on the order of 2.5x overspecification of the secondary switches (in a center tapped rectifier application) with weak snubbing so in the case of 12V I think 40-75V is more realistic than 100-150V.

In fact this demo board uses 75V devices for a 12V output. And consider the benefits of 'staying on the rails' by leverage a demo like this: They're providing the design and both analog and digital control solutions for this topology which can easily adapt to your 0-12V application (unlike LLC).
https://www.ti.com/tool/TIDM-PSFB-DCDC#technicaldocuments


This design gets 400Vout with 650V devices with some 'clever' active snubbers:
https://www.transphormusa.com/en/do...-for-3-3kw-electric-vehicle-on-board-charger/

 

[rxpu]

I'm not sure I agree with your analysis of the secondary. While its true the PSFB has worse ringing because of the secondary inductor position the secondary of the PSFB also soft switches. Anytime you see a diode in a power topology it's a clue there is soft switching because diodes can't hard switch themselves. So when the PSFB is running in its soft switching region all switches are soft switching, including the secondary rectifiers.

My own phase shifted full bridges have had on the order of 2.5x overspecification of the secondary switches (in a center tapped rectifier application) with weak snubbing so in the case of 12V I think 40-75V is more realistic than 100-150V.

In fact this demo board uses 75V devices for a 12V output. And consider the benefits of 'staying on the rails' by leverage a demo like this: They're providing the design and both analog and digital control solutions for this topology which can easily adapt to your 0-12V application (unlike LLC).
https://www.ti.com/tool/TIDM-PSFB-DCDC#technicaldocuments


This design gets 400Vout with 650V devices with some 'clever' active snubbers:
https://www.transphormusa.com/en/do...-for-3-3kw-electric-vehicle-on-board-charger/

Thank you for the detailed info.

My concerns or unhappiness for full bridge phase shift converter:

1- it needs 4 switches. Half bridge realisation is not possible.

2- I plan to use secondary synchronous rectification with mosfets. According to my understanding the primary side have ZVS (between %30 and full load) but the secondary side have no ZVS for all load ranges. I built one prototype, without heavy RC snubber, there were severe oscilations even for diode rectification. (compared to LLC secondary output, I fall in love with the clean and soft output secondary voltage of the LLC :-D )

3- I prefer to use voltage mode control for PSFB because of its simplicity. As seen in the datasheet if I use voltage mode control rather than peak current mode control I should place an expensive series capacitor in uF range (10-20uF for 1.5kW) for transformer flux balancing. If I want to omit this dc filtering series capacitor I should use peak current mode control which is not so easy to implement.

4- Going beyond 100khz is not easy for PSPB. ZVS is also lost under %30-35 load utilisation. So topology does not allow future miniaturisation of the supply size even if better semiconductors such as like GaN Fets. available.

 

[asdf44]

1) Agreed PSFB requires a full bridge. On the other hand a full bridge makes good sense for power reasons at 1.7kW.

2) Again just consider that the secondary switches will be replacing diodes. If diodes can do the job then the fets aren't hard switching. In-fact they can be turned off entirely and their internal diodes will take over. A control scheme could then turn on the fets only when the diodes are already conducting....and that's exactly what ZVS is.

The ringing is due to the 'colision' that happens between currents in the transformer leakage and currents in the secondary inductor. Agree LLC is better in this regard.

3) A "trick" I used was to specify the DC blocking caps only for the expected DC offset which should be <<10V. For example 15V caps clamped to 6V for protection during transients and start up. This allows much smaller caps.

4) Perhaps however the alternate modulation schemes you're proposing for LLC will likely not ZVS either.

 

[Easy peasy]

The diode clamped approach looks good if you must go the half bridge way - 600V 40A ST TO-247 mosfets, probably a good choice ...

 

[rxpu]

The diode clamped approach looks good if you must go the half bridge way - 600V 40A ST TO-247 mosfets, probably a good choice ...

There is a problem with the diode clamped approach. If I simulate the conventional LLC structure (without diode clamped capacitors) everything works fine. I measure the voltage on the resonant capacitor. It is around 300-400Vrms.

But! If I use the diode clamped topology, the capacitor voltage is clamped to the Vbus. So in our case it is cut to a maximum of 325V. This limitation limits also the power. So realising the 1.7kW with the diode clamped topology seems not so easy.

In order to get more power, I should decrease the freq and use higher Cres, or lower Lleak to operate in high frequency.

This adds another requirement that makes life harder.

Any ideas over diode clamped capacitor topology? Do I oversee something?

- - - Updated - - -

1) Agreed PSFB requires a full bridge. On the other hand a full bridge makes good sense for power reasons at 1.7kW.

2) Again just consider that the secondary switches will be replacing diodes. If diodes can do the job then the fets aren't hard switching. In-fact they can be turned off entirely and their internal diodes will take over. A control scheme could then turn on the fets only when the diodes are already conducting....and that's exactly what ZVS is.

The ringing is due to the 'colision' that happens between currents in the transformer leakage and currents in the secondary inductor. Agree LLC is better in this regard.

3) A "trick" I used was to specify the DC blocking caps only for the expected DC offset which should be <<10V. For example 15V caps clamped to 6V for protection during transients and start up. This allows much smaller caps.

4) Perhaps however the alternate modulation schemes you're proposing for LLC will likely not ZVS either.

Thank you for the very precise and usefull information.

The main and maybe the only reason why I insist on LLC is the secondary rectification. This power supply has infact 3 units each having 1.7kW and they are connected to different phases of a three phase network. the outputs of the converters are paralel connected to reach 5kW 10V @500A

In one system there are typically 12-14 devices workin also on the same load (sharing the load) that deliver 10V @6000A-7000A.

So my main focus is the efficiency on the secondary rectifiers.

Form this point of view:

PSFB: need to design active snubbers, but they may be complicated if we think that there are several units and devices pulsing to the same load.

LLC: Secondary rectification is very soft, no collisions. But there are 2 big drawbacks: Output voltage variation needs complicated control. The second issue is: Paraleling several LLCs with their own closed loop control may also be complicted and unreasoably overengineering just to get naturally less ringing on output rectifiers.

Do you think that I should invest my time for the efficient active or maybe passive snubbers for the phase shifted full bridge topology rather than losing time with the complicated structure of the LLC.

I feel that a solution with the LLC may be better. But it also contradicts the basic rule of engineering. If simple is enough, it is always the optimal solution.


Which way should I go?

 

[asdf44]

Well I think I've said my piece generally.

Easy Peasy has experience designing PSFB as well and should weigh in.

Again what's your control scheme here? Digital? That's the only way I see you being able to do any of the different LLC control schemes realistically. I write all digital control myself and it opens up many possibilities such as what you're entertaining. But if you make the wrong topology choices you could still be working on that digital control years from now.

Paralleling adds a whole other set of problems...Current mode control lends itself to paralleling but neither a PSFB or LLC in voltage mode is going to parallel without some additional thought and planning.

You mentioned peak current mode control earlier - I'll plug average current mode control here. For a quick demo board we tried to hack up peak hysteretic current mode control and it was a mess with noise. Then I switched to average current mode control and everything worked perfectly first try. Average current mode control solves the same problems, has many benefits and I see few downsides.

 

[rxpu]

Well I think I've said my piece generally.

Easy Peasy has experience designing PSFB as well and should weigh in.

Again what's your control scheme here? Digital? That's the only way I see you being able to do any of the different LLC control schemes realistically. I write all digital control myself and it opens up many possibilities such as what you're entertaining. But if you make the wrong topology choices you could still be working on that digital control years from now.

Paralleling adds a whole other set of problems...Current mode control lends itself to paralleling but neither a PSFB or LLC in voltage mode is going to parallel without some additional thought and planning.

You mentioned peak current mode control earlier - I'll plug average current mode control here. For a quick demo board we tried to hack up peak hysteretic current mode control and it was a mess with noise. Then I switched to average current mode control and everything worked perfectly first try. Average current mode control solves the same problems, has many benefits and I see few downsides.

I am using digital control. Specificly a dspic33EV controller. It has Phase shift control on each output, dead time insertion, master base for frequency control and many advanced feutures.

Before investigating LLC , I built a PSFB. But because of the secondary ringing (especially at low or no load) , I started searching better topologies where the secondary ringing is less and does not need snubber.

For PSFB, The power supply has 2 operating mode: Constant Voltage, variable current and Constant current variable voltage.

But for the control loops, I imagined 2 loops . first is the inner current loop and the second is the outer voltage loop.

Luckily ,my application does not need a fast response and have a slow changing load. (it is the opposite of battery charging, the power supply seperates the H2 and O2 gases from water through electrolyses.)

So I sample every 10us one current measurement point and gethar 1024 points in 10ms and then sort these values ascending. I throw away the first 32 and the last 32 from these 1024 points and then take an average.

I compare this value with the set value and modify through a very slow integrator and constant multiplier. The result decides my new duty cycle. (this decision is made every 10ms+1ms processing time=11msec)

The outer voltage loop functions just the same.

If the operator switches to constant current variable voltage mode the voltage loop acts as a limiter but not a regulator

If the operator switches to constant voltage variable current mode , the inner current control loop acts as a limiter but not a regulator.

My question is, I want to measure the current and voltage on the secondary side, not the primary.

Would you recommend it?

On the primary side there will be only a short circuit protection. It can be a passive or active protection. Passive protection is the primary inductance of the transformer and the high switching frequency.

Consequently, What do you say abaout my implementation of average current mode control and feeding the current loop through measuring the current on the secondary?

 

[Easy peasy]

For the problems you mention with capacitor clamp - upping the turns ratio to the output would help, and adjusting L C to suit. Are you able to model that? ( sim)

 

[treez]

Here is a good thread on the PSFB, and modifications to it...also a bit about sec diode ringing which OP is interested in.
https://www.edaboard.com/showthread.php?342663-Phase-Shift-Full-Bridge-SMPS-is-massively-over-hyped

Your Vin is 240VAC ( Three phase) and your vout is 2-10V(?)
At 10V you require 500A output.
You have a Boost PFC on each phase.

Why not put an LLC at the output of each Boost, with vout = 48V
The use paralleled synchronous bucks from there to get your 10V.
-Or use Vicor modules to get from the 48V to the 10V….we used vicor modules to efficiently get from 48v to 1.5V at 80A, more current than this can be done.
If you want a brief doc on all the different ways to do paralleled bucks then give me a shout and ill send a link on here