Unfamiliar VHDL | operator

[shaiko]

Hello,

What does the VHDL '|' (like bitwise or in C) operator do ?

 

[TrickyDicky]

Its not an operator.
It allows you to select multiple cases with case or with..select statements:

---

Code VHDL - [expand]
1
2
3
4
5
6
7
8
9
10
signal a : integer;
 
....
 
case a is
  when 0 =>
  when 1 to 14 =>
  when 15 | 20 | 25 =>
  when others => 
end case;

---