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[SOLVED] Flyback transformer design (100-150V in, 3 outputs 35W total)

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francis29

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Hi guys,
i have designed a transformer for flyback converter.
I am listing all specs please check it is okey or not.
thanks in advance.
Power supply input: 100V-150V
Output 1 : 20V/1A
Output 2 : 18V/0.1A
Output 3 : 12/1A
Total Output power : 35.58Watts
Efficiency : 90%
Max duty Cycle : 30%
Output diode voltage drop : 0.85V
switching frequency : 65KHz
Primary inductance : 148.83uH
Core : EE25/13/7 Epcos Gapped
Core : material N87
Gap : 0.25mm
Al value : 250nH
Current density : 4A/mm2
IMG_20170112_152452.jpg
 

Hi,

I can´t help you with the transformer.

Just a question: Output 1 and output 2 ... do they need to be isolated? Maybe it´s easier to use an LDO to generate the 18V from the 20V.

Klaus
 
1. 1 layer pri, then 1 layer sec, then 1 layer pri, then the final sec. or
Leakage inductance will be reduce ¼ th of regular primary secondary winding but inter winding capacitance will be double. Wave form rigging will be very less

2. 2 secondary layers directly together sandwiched between the two single primary layers.
Leakage inductance will be reduce 1/2 rd of regular primary secondary winding and less inter winding capacitance . Wave form rigging also less
Better to go ahead with second option (2.2)

(Inter winding capacitance are important if high voltage application)
 

I agree with Klaus. The 18v output is both low current and it is very close to the 20v supply.
Simplify your life, merge them both into a single 20v, 1.1 amp winding and use then a linear regulator.
 

Does anyone know how to calculate the RC snubbers across the output diodes in post 5.
 

This snubber is used to suppress high frequency ringing at the turn-off of the rectifier diode, caused by resonance between the diode capacitance and the flyback transformer secondary leakage inductance.

Snubber Resistance can be calculated by Rsn = √Lek_s / Cd
Lek_s : Secondary leakage inductance of fly back transformer(can be measure with LCR meter)
Cd id the parasitic capacitance across the diode
Snubber capacitance can be considered 2to 3 of parasitic capacitance of the diode (Cd)
For more information
https://www.fairchildsemi.com/application-notes/AN/AN-6093.pdf
 
20v and 18V winding should be isolated

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@satiz topswitch design input is different

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Actually 18v winding is for pwm IC supply
 

AN18 by power.com gives good advice for gerneral flyback transformer design.

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If you want to design a flyback transformer, then try and make each layer fill the bobbin window…as that give you better coupling…use parallel strands to achieve this if need be.

Also, make sure you don’t saturate….so your i(pri) peak should be less than (B.A.N)/L(pri)
Where
A = core cross scet. Area
B = 300mT
N = N(pri)
L(pri) = L(pri)

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get an excel sheet going and do the turns iteratively...you will converge to the desired number of turns.....at the end of the day, there is no single truly correct answer...there are many......some will put more voltage strss on the sec diodes...some will put more voltage stress on the pri drain.....some will allow a D max less than 0.5 which you may want so you can do current mode without needing slope compenation.....have you ever made a pot on a potters wheel...that is how you design a flyback transformer.........iteratively, converge to a nice solution...........it is quick because you just use the one excel calc sheet.

If your turns ratio means you have a duty cycle of 0.99 then you need to go again...you know what i mean. If you end up with huge voltage stress on sec diode then re-do, etc etc
 
Thanks a lot treez.
I have few more doubts
** The voltage stress on secondary diode is independednt of the voltage spike on the primary due to leakage inductance right??
** Can you please suggest some application notes of current mode control and slope compensation and its effect on maximum duty cycle??
** For finding a correct core according to the power level required which is good method?? I heard area product and core geometry are usefull. I simply use power chart for particular frequency to get the approximate core.
 

just do it iteratively and go for next size up if your peak b is too high.
The leakage ring in the pri is related to the leakage ring in the secondary......if the pri is nt fully coupoled to sec then neither is sec fully coupled to pri, to put it as such.
Core ideally shoudl be long and use full length of bobbin with all layers for good coupling, but ususally its a compromise...use interleaving to get leakage down...dont
have too much layers or else proximity loss starts biting.....
Stuff your spec into Power.com design program to check your design if you want...its called pi expert and will only take you 1 minute.

Ill send you the doc from ridley on slope comp...i have to go to shop first b4 close
 
here is ridley doc on slope comp
 

Attachments

  • _5 Current Mode Control Modeling.pdf
    1 MB · Views: 245
In order to find out maximum power loss allowable we need to know the thermal resistance (Rth). Where can i find this data.
I am using formula Pmax= (Maximum temperature rise)/(Thermal resistance)

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For finding copper loss MLT (mean length per turn) is required. Where can i find this data??
 

MLT is Mean length per turn, If you have a single rectangular bobbin, you can calculate MLT by this equation MLT = (Bobbin length + Bobbin breath) + (Bobbin length after winding + Bobbin breath after winding)
Ideally it should be total length of the winding conductor divided by number of turns
 
How to choose the right core size?? like EE,EFD,ETD POT RM....
 

Core geometry selected based on the application
EE, PQ cores are good in thermal stability and easy of winding
POT cores are good in magnetic shielding
EFD and planar EE cores are used when low profile (height) requirement
 

In order to find out maximum power loss allowable we need to know the thermal resistance (Rth). Where can i find this data.
 

OK, I now understand why you require separate 18 and 20 v windings.
 

Total loss can calculated by I^2 R loss+Core Loss
Then Temperature rise can be calculated by (Total loss and wound core surface area)Delta t.png
 

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