FPGA Configuration volatile/Flash

[beginner_EDA]

Hi,
I would like to know when FPGA is configured as volatile with .bit file over JTAG, is there any memory(IC Chip) on the FPGA for this purpose or it direct configures FPGA(e.g. kintex xc7k325)? It's not clear to me which memory/IC chip is responsible for this?
when FPGA is programmed with .bit file and works as long as power on. Where this .bit file is loaded? Is it also on some memory or direct on FPGA?

I know that for Flash, there is either SPI or BPI Flash memory IC chip on FPGA where .mcs file is loaded.

 

[dpaul]

I would like to know when FPGA is configured as volatile with .bit file over JTAG, is there any memory(IC Chip) on the FPGA for this purpose or it direct configures FPGA(e.g. kintex xc7k325)?
It's not clear to me which memory/IC chip is responsible for this?

FPGA is directly configured. There isn't any memory chip INSIDE the FPGA that stores a bit file.

Where this .bit file is loaded? Is it also on some memory or direct on FPGA?

BIT file contains information on how each input of the LUT is wired to the connection matrix. The BIT file will also contain the initial values that go inside the block RAM. It will describe what is connected to the set and reset pins of each flip flop in each slice. It will describe how the carry chain is connected. It will describe the logic interface for each IOB. It will describe any integrated pull-up or pull-down resistors. Basically, everything. In other words as far as I know, it directly configures the FPGA.

So the reason the FPGA program is not permanent is because the logic fabric is composed of volatile memory (e.g. SRAM). So when the FPGA loses power, the program is forgotten. That's why they need e.g. Flash chips as non-volatile storage for the FPGA program, so that it can be loaded whenever the device is powered on. These flash chips are off-FPGA memory chips.

 

[ThisIsNotSam]

There are also FLASH-based FPGAs, I believe that is what the OP is asking about. Once programmed they don't need any refreshes and will hold value even without power. This is done across the entire FPGA as every configuration SRAM bit is replaced by an FLASH bit. It is not a flash block memory.

 

[ads-ee]

There are also FLASH-based FPGAs, I believe that is what the OP is asking about. Once programmed they don't need any refreshes and will hold value even without power. This is done across the entire FPGA as every configuration SRAM bit is replaced by an FLASH bit. It is not a flash block memory.

I don't think they were asking about flash based FPGAs. They specified a Xilinx Kintex part, which is definitely an SRAM based FPGA.

OP, the majority of Xilinx's product line consists of devices with SRAM based configuration cells. The configuration memory (the memory that holds your design connections) is structured in frames of data that either set the contents of LUTs, the various options for connections to BRAMs/DSP/IO/FF/PLL/MMCM/etc, the initial contents of BRAMs, the initial content of FFs, and other device settings.

You should really read all the documentation on Xilinx's website for the family of parts you are using. The configuration memory architecture is described in detail in the configuration user guide. I know there is a lot of documentation, but you should really read every page of it at least once to get an idea of what is in the device and what you can do with it.

 

[matrixofdynamism]

The bits that we send to the FPGA actually cause certainly connections to be made or not made in the routing network among the on chip resources. Thus you could think of the bits as being converted into connections.

The flash based FPGAs store these bits in on chip flash which is read out to create this connections after power up.

Those FPGAs that are not "SRAM based" basically follow an approach in which ones these bits are transferred and these connections are made, these connections are not volatile and remain even after power down.

Remember, the Altera MAX series is not strictly speaking, a CPLD. It is merely an SRAM based FPGA with an on chip flash memory so we don't need to store the configuration bit stream onto an external flash.