asynchronous fifodepth calculation when read is slower than write

[Ayman Muhamad Ahmed]

Hi all,

I'm designing an asynchronous fifo with read freq=66Mhz and Write freq of 166 Mhz, with no information about data burst or data rates.
How Could i calculate the Fifo's depth ? is there any suggested size in this case ?? or it will be infinite ??

Thanks,
Ayman

 

[sharath666]

You will have to tell us the data burst size and rate. Only then one can determine the depth. You can possibly end up in a situation where the write rate is higher than the read rate in which case it makes no sense using a FIFO(since it will overflow) and you have to revisit your design.

 

[shaiko]

What do you mean??
If you're the one designing the FIFO then you're the one deciding about the required depth. You base your decision on the requirements.

If your designing a generic FIFO you can simply determine the depth with a generic/parameter when you instantiate your design.

 

[ads-ee]

Hi all,

I'm designing an asynchronous fifo with read freq=66Mhz and Write freq of 166 Mhz, with no information about data burst or data rates.
How Could i calculate the Fifo's depth ? is there any suggested size in this case ?? or it will be infinite ??

Thanks,
Ayman

You have three options:
1) Find out what the burst and data rates for the two sides of the interface and compute the depth accordingly.
2) Supply a design which reports a read_ready and write_ready flag (could be the same as the inverted empty and full flags respectively) and let the person interfacing to your FIFO figure out what to do when they can't write data when the FIFO is full or read from it when it's still empty.
3) stick in the biggest FIFO you can afford, compute the maximum allowed burst write and tell the people using it that it will fail to work if they exceed that burst time.